Global Standards for the Microelectronics Industry
DDR5, LPDDR5 & NVDIMM-P Workshops and Memory Tutorial
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The JEDEC DDR5, LPDDR5 and NVDIMM-P Workshops will offer participants an unparalleled opportunity to receive an in-depth technical review of these standards. On the day before the DDR5 Workshop, a companion Memory Tutorial class will be offered. Covering every DRAM generation, the Memory Tutorial is an essential prerequisite for prospective DDR5 Workshop attendees who do not have significant experience with DDR4 memory technology.
Online registration and more information coming soon.
Interested in attending? Let us know and we'll notify you by email when registration opens.
|October 7, 2019||LPDDR5 Workshop||Santa Clara, CA|
|October 7, 2019||Memory Tutorial: A DDR5
|Santa Clara, CA|
|October 8-9, 2019||DDR5 Workshop||Santa Clara, CA|
|October 10, 2019||NVDIMM-P Workshop||Santa Clara, CA|
|October 14, 2019||LPDDR5 Workshop||Hsinchu, Taiwan|
|October 14, 2019||Memory Tutorial: A DDR5
|October 15-16, 2019||DDR5 Workshop||Hsinchu, Taiwan|
|October 17, 2019||NVDIMM-P Workshop||Hsinchu, Taiwan|