RAM

POD10-1.0 V PSUEDO OPEN DRAIN INTERFACE

JESD8-25

Published: Sep 2011

This document defines the 1.0 V Pseudo Open Drain Interface family of interface standards, POD10, which are generally expected to be implemented with differential amp-based input buffers that, when in single-ended mode, employ an externally supplied (or internal supplied) reference voltage controlled trip-point.

Committee(s): JC-16

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POD12 ‐ 1.2 V PSEUDO OPEN DRAIN INTERFACE

JESD8-24

Published: Aug 2011

This document defines the 1.2 V Pseudo Open Drain Interface family of interface standards, POD12, which are generally expected to be implemented with differential amp-based input buffers that, when in single-ended mode, employ an externally supplied (or internal supplied) reference voltage controlled trip-point. Although this standard is named for the nominal value of VDDQ to be used, it is the input trip-point value that provides for inter operability of POD12 compliant devices.

Committee(s): JC-16

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