|COPLANARITY TEST FOR SURFACE-MOUNT SEMICONDUCTOR DEVICESStatus: Reaffirmed June 2016||JESD22-B108B||Sep 2010|
The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity at room temperature for surface-mount semiconductor devices. This test method is applicable for inspection and device characterization. If package warpage or coplanarity is to be characterized at reflow soldering temperatures, then JESD22-B112 should be used.
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Contact Julie Carlson, 703-624-9230