0.5 V LOW VOLTAGE SWING TERMINATED LOGIC (LVSTL05)

JESD8-33

Published: Jun 2019

This standard defines power supply voltage range, dc interface, switching parameter and overshoot/undershoot for high speed low voltage swing terminated NMOS driver family digital circuits. The specifications in this standard represent a minimum set of interface specifications for low voltage terminated circuits. Item 159.03

Committee(s): JC-16

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