JEDEC MODULE SIDEBAND BUS (SidebandBus)

JESD403-1.01

Published: Jul 2021

This standard is a minor editorial revision to JESD403-1, it defines the assumptions for the system management bus for next generation memory solutions; covering the interface protocol, use of hub devices, and voltages appropriate to these usages. Item 2260.37B.

Committee(s): JC-45

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