Global Standards for the Microelectronics Industry
Secure Serial Flash Bus Transactions
Published: Dec 2022
This standard describes SPI bus transactions intended to support Secure Flash operation on a serial memory device. The on-chip SFDP database described in JESD216 has been revised to include details about the secure transactions. This ballot does not describe the SFDP revisions or the secure packet structure.
Committee(s): JC-42, JC-42.4
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