Global Standards for the Microelectronics Industry
voltage turn-off delay time (td(off)v)
The time interval during which an input pulse that is switching the transistor from a conducting to a nonconducting state falls from 90% of its peak amplitude and the drain voltage waveform rises to 10% of its off-state amplitude, ignoring spikes caused by interaction with other components or parasitics, e.g., freewheeling-diode recovery current and parasitic inductance.
References:
JESD24, 7/85
JESD77-B, 2/00