Global Standards for the Microelectronics Industry
voltage delay time (of a transistor) (tdv)
The time interval during which an input pulse that is switching the transistor from a nonconducting to a conducting state rises from 10% of its peak amplitude and the collector voltage waveform falls to 90% of its on-state amplitude, ignoring spikes caused by interaction with other components or parasitics, e.g., freewheeling-diode recovery current and parasitic inductance.
References:
JESD77-B, 2/00
