Global Standards for the Microelectronics Industry
output enable (1) (general)
A control input to an integrated circuit that, depending on the logic level applied to it, either permits or prevents the output of data from the device.
NOTE When disabled, the outputs assume a low level, a high level, or a floating (high-impedance) state, depending on the design of the particular circuit.
(2) (of a memory) [pin name G(n); OE(n)]: the input that, when false, disables the outputs and causes them to go to an inactive state but does not affect the writing function.
NOTE When disabled, the inactive state is floating (Z, high-impedance) for MOS and TTL devices, and low (L) for ECL devices. In modules that have multiple OEs, the OEs are numbered beginning with 0.
References:
JESD100-B, 12/99
JESD21-C, 1/97