Global Standards for the Microelectronics Industry
data cycle
A cycle in which each bit changes to its opposite state and back to its original state.
NOTE 1 These changes may occur for all bits in parallel or in series, e.g., by page, block, word, byte, or bit.
NOTE 2 This cycle may be used as a unit of endurance for erasable programmable read-only memories.
References:
JESD100-B, 12/99
