Global Standards for the Microelectronics Industry
cavity package
A package containing a cavity that is intended to be occupied by a chip.
References:
JESD22-B103B#, 6/02
JESD22-B104C#, 11/04
A package containing a cavity that is intended to be occupied by a chip.
JESD22-B103B#, 6/02
JESD22-B104C#, 11/04