back end of line (BEOL) (noun)

The portion of the semiconductor processing line that creates the conductive lines carrying power and signals between devices and to the interface connecting off-chip.
References: 

JEP156, 3/09

Browse Alphabetically

A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z

Document Information

Standards & Documents Assistance:

Published JEDEC documents on this website are self-service and searchable directly from the homepage by keyword or document number. 

Click here for website or account help.

To report potential errors or make suggestions for improvement to a published JEDEC standard, please use this form.  JEDEC does not accept requests for implementation assistance or interpretation of documents. For other inquiries related to standards & documents email Angie Steigleman.

Dictionary RSS Feed

Subscribe to the JEDEC Dictionary RSS Feed to receive updates when new dictionary entries are added.