Dictionary Z

Zener diode

Alternative name for "voltage-reference diode" and "voltage-regulator diode".

References:

JESD77-B, 2/00

zero scale (of an analog-to-digital converter [a digital-to-analog converter] with true zero)

A term used to refer a characteristic to the step whose nominal midstep [step] value equals zero.

NOTE 1 The subscript for the letter symbol of a characteristic at zero scale is "ZS".

NOTE 2 In place of a letter symbol, the abbreviation "ZS" is commonly used.

References:

JESD99B, 5/07

zero scale, negative (of an analog-to-digital converter or digital-to-analog converter with no true zero)

A term used to refer a characteristic to the negative step closest to analog zero.

NOTE 1 The subscript for the letter symbol of a characteristic at negative zero scale is
"ZS-", e.g., VZS-,IZS-.

NOTE 2 In place of a letter symbol, the abbreviation "ZS-" is commonly used.

References:

JESD99B, 5/07

zero scale, positive (of an analog-to-digital converter or digital-to-analog converter with no true zero)

A term used to refer a characteristic to the positive step closest to analog zero.

NOTE 1 The subscript for the letter symbol of a characteristic at positive zero scale is "ZS+", e.g., VZS+, IZS+.

NOTE 2 In place of a letter symbol, the abbreviation "ZS+" is commonly used.

References:

JESD99B, 5/07

zero-gate-voltage drain current (IDSS)

The direct current into the drain terminal when the gate-source voltage is zero.

NOTE This is an on-state current in a depletion-type device, an off-state in an enhancement-type device.

References:

JESD24, 7/85

zero-gate-voltage source current (ISDS)

The direct current into the source terminal when the gate-drain voltage is zero.

References:

JESD24, 7/85

zero-scale error (of a linear analog-to-digital converter [digital-to-analog converter]) (EZS)

The difference between the actual midstep [step] value and the nominal midstep [step] value at specified zero scale.

NOTE Normally, this error specification is applied to converters that have no arrangement for an external adjustment of offset error and gain error.

References:

JESD99B, 5/07

ZIP/SIMM, ZIP/SIMM module

A multichip memory module in which the body has a single-in-line package (SIP) form but the leads have been formed into a zigzag configuration.

References:

JESD21-C, 1/97

ZZ

See "sleep-mode enable".

References:

µC|µC|

See "microcomputer".

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µP|µP|

See "microprocessor (integrated circuit)".

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