Global Standards for the Microelectronics Industry
Dictionary S
S(n)(x)
See "chip select".
References:S, s
See "source terminal".
References:SA; SAn
See "sync address".
References:SAM
See "serial-access memory".
References:sample holder
A device intended to position the samples in the proper place, keep the samples from moving during the scan, and maintain planarity.
References:J-STD-035, 5/99
sample period
The period of time selected by the manufacturer to accumulate data for the calculation and reporting of average outgoing quality (AOQ).
References:JESD16-A, 4/95
sample window time (tsw)
The length of the interval during which the temperature-sensitive parameter is measured after heating power is removed.
References:JESD51-1, 12/95
saturated cross section; limiting cross section
The maximum observable cross section.
NOTE On many softer devices, the saturated [limiting] cross section appears as the asymptotic upper section of the linear-energy-transfer (LET) vs cross-section curve. An additional increase in LET will not increase the cross section of the device. On harder devices, the cross section may not reach saturation.
References:JESD57, 12/96
saturation
A base-current and a collector-current condition resulting in a forward-biased collector junction.
References:JESD10, 9/81
JESD77-B, 2/00
saturation drain current (ID(sat))
The drain current measured when the transistor is biased in the saturation region.
References:JESD28-A, 12/01
JESD60A, 9/04
JESD90, 11/04
saturation input signal (1) (for analog signal applications of a charge-transfer device)
The maximum input signal or illumination power that can be transferred with a specified degree of linearity.
(2) (for digital signal applications of a charge-transfer device): The input signal or illumination power that is required to produce full-well-capacity charge packets.
References:JESD99B, 5/07
JESD99B, 5/07
saturation output signal (for digital signal applications of a charge-transfer device)
The output signal that is produced by full-well-capacity charge packets.
References:JESD99B, 5/07
saturation region (of a field-effect transistor)
The region of the drain voltage-current characteristic curve in which a change in drain-source voltage causes a relatively small change in drain current.
References:JESD24, 7/85
JESD77-B, 2/00
saturation voltage, base-emitter (VBE(sat))
The voltage between the base and emitter terminals for specified base-current and collector-current conditions that are intended to ensure that the collector junction is forward-biased.
References:JESD10, 9/81
JESD77-B, 2/00
saturation voltage, collector-emitter (VCE(sat))
The voltage between the collector and emitter terminals under conditions of base current or base-emitter voltage beyond which the collector current remains essentially constant as the base current or voltage is increased. (Ref. IEC 747‑7.)
NOTE This is the voltage between the collector and emitter terminals when both the base-emitter and base-collector junctions are forward-biased.
References:JESD10#, 9/81
JESD77-B, 2/00
SBx
See "sync byte 'x' write enable".
References:SC
See "serial clock".
References:scan cell
A bistable element that includes one or more ports used to observe and control that element's state when the port or ports are enabled.
References:JESD12-1B, 8/93
JESD99B, 5/07
scan insertion
The conversion of bistable elements into scan cells.
References:JESD12-1B, 8/93
JESD99B, 5/07
