Dictionary M

See "mask/mode".

See "mega (as a prefix to units of semiconductor storage capacity)".

See "mode control".

See "mode select".

See "match".

The sequence of operations that corresponds to one memory cycle, input/output (I/O) cycle, or equivalent internal operation in a central processing unit (CPU). (Ref. IEC 824.)

NOTE An instruction may require one or more machine cycles for its execution. A machine cycle usually contains more than one clock cycle.

JESD100-B, 12/99

An interconnection of primitives and/or macrocells that implements an electrical function but has no predetermined physical layout.

JESD12-1B, 8/93
JESD99B, 5/07

The physical cell area contained within a polygon (often a rectangle) that circumscribes the cell. (See also "unit gate size".)

JESD12-1B, 8/93
JESD99B, 5/07

A characterized fixed layout and interconnection of primitives that implement an electrical function.

NOTE Characterization may be done either by measurement of fabricated devices or by computer simulation or by both. Characterization may include the following aspects: physical dimensions, logic functionality, testability, layout-rule compliance, ac and dc electrical performance, and reliability.

JESD12-1B, 8/93
JESD99B, 5/07

The part of internal storage into which instructions and other data must be loaded for subsequent execution or processing. (Ref. ANSI X3.172.)

JESD100B.01, 12/02

The main terminal intended by the thyristor manufacturer to conduct the control current in addition to the principal current.

NOTE Some bidirectional triode thyristors are completely symmetrical, e.g., SBS thyristors. For these, the choice for the manufacturer is arbitrary, and the user can return the control circuit to whichever main terminal will provide the required polarity of gate current.

JESD77-B, 2/00

The other main terminal after main terminal 1 has been designated by the thyristor manufacturer.

JESD77-B, 2/00

The two terminals through which the principal current flows.

JESD77-B, 2/00

The type of carrier constituting more than half of the total charge-carrier concentration.

JESD77-B, 2/00

The maximum cumulative time after bake that components may be exposed to ambient conditions prior to shipment to the end user.

J-STD-033B#, 10/05

All areas and operations where products or services are processed, stored, or handled.

EIA-557-A, 7/95

Acceptance testing of a change to a surface finish manufacturing process already accepted by a technology acceptance (q.v.).

JESD201, 3/06

NOTE    A mark can give information on such items as terminal location, country of origin, manufacturer, date code, lot number, and device identification, e.g., a part number.

A patterned screen of any of several materials and types used in shielding selected areas of a semiconductor, photosensitive layer, or substrate from radiation during processing, so that the unshielded areas can be further processed to reproduce the chosen pattern.

NOTE The type of mask can be designated either by type (e.g., oxide mask or metal mask) or by function (e.g., diffusion mask or vapor-deposition mask).

JESD99B, 5/07

A fixed-program read-only memory in which the data content of each cell is determined during manufacture by the use of a mask. (Ref. IEC 748‑2.)

JESD100-B, 12/99