Dictionary I

integrated circuit, passive hybrid film

A hybrid film integrated circuit in which all circuit elements are passive.

References:

JESD99B, 5/07

integrated circuit, semiconductor

A semiconductor device designed as an integrated circuit.

References:

JESD99B, 5/07

integrated circuit, single chip

An integrated circuit or microcircuit consisting exclusively of elements formed in situ on or within a single semiconductor substrate with at least one of the elements formed within the substrate.

References:

JESD99B, 5/07
JESD93, 9/05

integrated circuit, thick-film

A film integrated circuit whose circuit elements are thick-film elements.

References:

JESD99B, 5/07

integrated circuit, thin-film

A film integrated circuit whose circuit elements are thin-film elements.

NOTE Usually, thin-film elements are formed by vacuum-deposition techniques, possibly supplemented by other deposition techniques.

References:

JESD99B, 5/07

integrated circuit, very-high-speed (VHSIC)

An integrated circuit meeting the following goals for speed and density established by the U.S. Department of Defense:

Phase 1 goals

product of operating frequency
and equivalent gate density 5 × 1011 Hz×gates/cm2 minimum

clock frequency 25 MHz minimum

Phase 2 goals

product of operating frequency
and equivalent gate density 1 × 1013 Hz×gates/cm2 minimum

clock frequency 100 MHz minimum

References:

JESD99B, 5/07

intentionally added

The deliberate use in the formulation of a product or subpart where its continued presence is desired to provide a specific characteristic, appearance, or quality.

References:

JIG101, 5/05

interactive layout

The manual modification or influence used in the pattern layout, cell placement, or interconnect routing in an otherwise automatic layout tool.

References:

JESD12-1B, 8/93
JESD99B, 5/07

interconnect layer

A conductive layer used for electrical interconnection of circuit elements on an integrated circuit.

References:

JESD12-1B, 8/93
JESD99B, 5/07

interconnection unit capacitance

The capacitance per unit length attributable to a specified interconnection layer.

References:

JESD12-1B, 8/93
JESD99B, 5/07

interface integrated circuit

See “integrated circuit, interface”. References:

intermetallic compound (IMC)

A substance formed when solder comes in contact with another metal at elevated temperature. NOTE    The IMC is composed of multiple constituents from the solder and the other metal. This material has unique mechanical and electrical properties, which are different from those of the initial solder and the other metallization. References:

JEP154, 1/08

intermetallic fracture

A failure found in tensile pull of flip chip solder joints, where any portion of the fracture surface occurs at an intermetallic formed between the solder and the device or substrate metallization.

References:

JESD22-B109, 6/02

internal circuits

Cells or macros that communicate only with other cells or macros on the same cell-based integrated circuit.

References:

JESD12-4, 4/87

internal electric field (in a transition region)

The electric field due to the presence of space charges in the transition region.

NOTE This field is dependent on the impurity profile of the transition region and on the bias applied between the two adjacent neutral regions.

References:

JESD77-B, 2/00

internal electromagnetic pulse (IEMP)

An electromagnetic pulse generated by electrons that are ejected from the surfaces interior to an enclosure with conducting walls due to the interaction of a pulse of energetic photons with the surface material(s).

References:

JEP133B, 3/05

internal equivalent temperature

Synonym for "virtual-junction temperature".

References:

JESD99B, 5/07

interrupt mask

A central processing unit (CPU) feature that allows the computer to ignore (mask) an interrupt request until the mask bit is disabled.

References:

JESD100-B, 12/99

interrupt request

An external signal that requests a temporary suspension of the normal program operation in order to permit processing of a higher-priority operation.

NOTE Multiple interrupt capability requires establishment of an interrupt-priority system.

References:

JESD100-B, 12/99

interrupt; interruption

A suspension of a process, such as the execution of a computer program, caused by an event external to that process and performed in such a way that the process can be resumed. (Ref. IEC 824.)

References:

JESD100-B, 12/99

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