Global Standards for the Microelectronics Industry
Dictionary I
input impedance, differential (zid)
The small-signal impedance between two ungrounded input terminals of a differential amplifier.
References:JESD99B, 5/07
input impedance, single-ended (zis)
The small-signal impedance between one input terminal of a differential amplifier and ground with the other input terminal ac-grounded.
References:JESD99B, 5/07
input load
The load (usually specified in unit loads) represented by a given input.
References:JESD12-1B, 8/93
JESD99B, 5/07
input offset current (IIO)
The difference between the currents into the input terminals of a differential-input device in the balanced state.
References:JESD99B, 5/07
input offset voltage (VIO)
The dc voltage that must be applied between the input terminals to force the quiescent dc output voltage to zero or other specified level.
References:JESD99B, 5/07
input protective voltage (VIP)
An input voltage in a region of relatively low differential resistance that serves to limit the voltage swing for the purpose of input protection.
References:JESD99B, 5/07
input resistance (ri)
The small-signal resistance between an input terminal and ground or between differential input terminals.
References:JESD99B, 5/07
input threshold voltage (VIT)
The input voltage level that, when crossed, enables an output to change its logic state.
References:JESD99B, 5/07
input voltage (of a voltage regulator) (VI)
The supply voltage to be regulated.
References:JESD99B, 5/07
input-output voltage differential (VI - VO)
The difference between the input voltage and the output voltage.
References:JESD99B, 5/07
input/output (I/O)
A generic term for an otherwise undefined signal pin that can operate as either an input or an output. This term is not used as a specific pin name but only as a generic indicator of the nature of the function of the pin.
References:JESD21-C#, 1/97
input/output data mask (DQM)
A control signal, used primarily on SDRAMs, that acts as a mask for reading and writing functions. In some instances, the DQM term includes a prefix "U" or "L" indicating upper or lower byte control. In devices where more than two data bit groupings have a data mask applied, an "x" is applied, where "x" takes the values of a, b, c, etc.
References:JESD21-C, 1/97
inputs for modeling
The substantive and quantifiable attributes or input of a process model that, when combined into a common process or methodology, can be utilized to simulate the desired output.
References:JEP132, 7/98
insertion loss
The ratio of power delivered to a load with no ABD in the circuit to that delivered after the ABD is inserted.NOTE Insertion loss is generally expressed in decibels. It is frequency-dependent due to the inductance, capacitance, and resistance of the ABD.
References: JESD77C, 10/09JESD210, 12/07
inspection
The assessment of a characteristic and its comparison to a standard. Examples of inspections include low-temperature electrical tests, room-temperature tests, and visual inspection.
References:EIA-557-A#, 7/95
JESD16-A, 4/95
instability, long-term (accuracy) (ΔE(Δt) or ΔE(t))
The additional error caused by the ageing of the components and specified for a relatively long period of time.
References:JESD99B, 5/07
instantaneous failure rate; hazard rate [h(t)]
The rate at which devices are failing referenced to the survivors (not to the initial number of units).
NOTE h(t) = f(t)/R(t).
References:JESD85, 7/01
instruction register
A register that is used to hold an instruction for interpretation. (Ref. IEC 824.)
References:JESD100-B, 12/99