Dictionary F

fan-in

The number of output ports on a net.

References:

JESD12-1B, 8/93
JESD99B, 5/07

fan-out

The number of input ports on a net.

References:

JESD12-1B, 8/93
JESD99B, 5/07

far back end of line (FBEOL) (noun)

The portion of the semiconductor processing line that creates the metal layer (e.g., the under-bump-metal or redistribution layer) and associated interconnect structures forming the connection between on-chip and off-chip wiring. References:

JEP156, 3/09

far back-end-of-line (FBEOL) (adj)

Pertaining to the portion of the semiconductor processing line that creates the metal layer (e.g., the under-bump-metal or redistribution layer) and associated interconnect structures forming the connection between on-chip and off-chip wiring. References:

JEP156, 3/09

fault

A defect that may cause a failure in the circuit operation and/or timing.

NOTE Subclassifications of faults may not be mutually exclusive.

References:

JESD12-5, 8/88

fault coverage

The percentage of possible faults detected by a set of test vectors.

References:

JESD12-1B, 8/93
JESD99B, 5/07

fault detectability ratio

The ratio of detectable faults to the sum of detectable and undetectable faults.

References:

JESD12-5, 8/88

fault grading

The process of determining the test-pattern fault coverage of a circuit.

References:

JESD12-5, 8/88

fault simulation

The process of applying test vectors to a circuit or circuit model to obtain fault-coverage information.

References:

JESD12-1B, 8/93
JESD99B, 5/07

fault-tolerant design

A design approach intended to enhance the ability of a circuit to remain operational after the occurrence of a fault.

NOTE Fault-tolerant design techniques may impact fault detection.

References:

JESD12-5, 8/88

FCT series

A fast CMOS series that includes devices whose input logic levels are TTL-input-compatible and whose outputs are specified at TTL levels.

References:

JESD18-A#, 1/93

FCTXXX series

An FCT series of fast CMOS devices with a complementary output stage. These are generally referred to as devices with CMOS output swing.

References:

JESD18-A#, 1/93

FCTXXXT series

An FCT series of fast CMOS devices with reduced output swing. These devices are generally referred to as devices with TTL output swing.

References:

JESD18-A#, 1/93

feature

A physical portion of a part, such as a surface, hole, or slot.

References:

JESD95-1, 3/97

feedback sense voltage (of a voltage regulator)

The voltage that is a function of the output voltage and is used for feedback control of the regulator.

References:

JESD99B, 5/07

feedthrough capacitance (of a multiplying digital-to-analog converter) (CF)

The value of the capacitance for a specified value of resistance in an equivalent circuit for the calculation of the feedthrough error.

NOTE The equivalent circuit consists of a high-pass R-C filter between the reference input and analog output.

References:

JESD99B, 5/07

feedthrough error (of a multiplying digital-to-analog converter) (EF)

An error in analog output, due to variation in the reference voltage, that appears as an offset error and is proportional to the frequency and amplitude of the reference signal.

NOTE 1 The specification for the feedthrough error is given for the digital input for which the offset error is specified, and for a reference signal of specified frequency and amplitude.

NOTE 2 This error may also be expressed as a peak-to-peak analog value.

References:

JESD99B, 5/07

FEEPROM

See "flash EEPROM".

References:

FET

See "field-effect transistor".

References:

FIC

See "integrated circuit, film".

References:

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