Global Standards for the Microelectronics Industry
Dictionary A
assembled state (of a component)
The state of a component that has been attached to a second-level assembly.
References:JEP150, 5/05
JEP156, 3/09
assembly, microelectronic
See "microelectronic assembly".
References:assignable cause
Synonym for "special cause".
References:associative memory
Synonym for "content-addressable memory". (Ref. IEC 748‑2.)
References:JESD100-B, 12/99
ASSP
See "application-specific standard product".
References:asymmetry, full-scale (of a digital-to-analog converter with a bipolar analog range) (ΔIFSSor ΔVFSS)
The difference between the absolute values of the two full-scale analog values.
References:JESD99B, 5/07
asynchronous circuit
A circuit whose changes of state are not controlled by a single clock.
References:JESD12-1B, 8/93
JESD99B, 5/07
ATTF
See "actual time to fail".
References:attribute data
Data that result from counting items or classifying items into distinct nonoverlapping categories. Examples are count data (e.g., the number of nonconforming items), ordinal data (e.g., rank: first, second; classification: excellent, good, poor), nominal data (e.g., unordered groupings such as defect type), or pass/fail data.
References:EIA-557-A, 7/95
attribute memory select (RG)
An input that, when active (low), selects the attribute memory and, when inactive (high), selects the main memory for normal access.
NOTE Attribute memory is a separately accessed section of memory on the card and is generally used to record capacity and other configuration and attribute information. Main memory is used to store user data.
References:JESD21-C#, 1/97
audit
The periodic observation of procedures and performed activities to evaluate compliance with requirements.
References:EIA-557-A, 7/95
auto-load read transfer (ART)
A split serial-access memory (SAM) data register transfer in which the transfer into each half is automatically triggered by the state of the tap pointer counter after each half of the SAM register is emptied.
References:JESD21-C, 1/97
auto-load write transfer (AWT)
A split serial-access memory (SAM) data register transfer in which the transfer from each half is automatically triggered by the state of the tap pointer counter after each half of the SAM register is filled.
References:JESD21-C, 1/97
autodoping
The introduction of impurities from the substrate into the epitaxial layer during the process of epitaxy.
References:JESD99B, 5/07
automatic gain control range (AGC range)
The maximum change in gain expressed in dB that may be achieved by application of a specified range of the dc voltages to the AGC input.
References:JESD99B, 5/07
auxiliary terminal (of a semiconductor power-control module)
A terminal, other than an ac, dc, or control terminal, that may be provided for a specified purpose.
References:JESD14#, 11/86
available gates (in a gate array)
The total number of potentially usable, unconnected gate equivalents in a given array area.
References:JESD12-1B, 8/93
JESD99B, 5/07
avalanche breakdown diode (ABD)
A transient voltage suppressor that is a semiconductor diode with a single p-n junction (or with multiple p-n junctions none of which interact) whose operation depends in part on its breakdown characteristics. References: JESD77C, 10/09JESD210, 12/07
avalanche current, repetitive peak (IAR)
The peak current reached repetitively during device avalanche in an inductive-load switching circuit.
References:JESD24-8#, 8/92