Global Standards for the Microelectronics Industry
Recently Published Documents
Title | Document # | Date | Details |
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DDR5 SODIMM Raw Card Annex D Version 1.0 This annex JESD309-S4-RCD, DDR5 Small Outline Dual Inline Memory Module with 4-bit ECC (EC4 SODIMM) Raw Card D Annex defines the design detail of x8, 1 Package Rank DDR5 SODIMM with 4-bit ECC. The common feature of DDR5 SODIMM such as the connector pinout can be found in the JESD309, DDR5 Small Outline Dual Inline Memory Module (SODIMM) Common Standard. |
JESD309-S4-RCD | Jun 2022 | view |
DDR5 SODIMM Raw Card Annex C Version 1 This annex JESD309-S0-RCC, DDR5 Small Outline Dual Inline Memory Module (SODIMM) Raw Card |
JESD309-S0-RCC | Jun 2022 | view |
JEDEC COMMITTEE SPECIFIC ADDITIONAL POLICIES In some cases, JEDEC Committees have established additional policies and guidelines to facilitate the operation of a particular committee. Additional policies and guidelines are set forth here as an addendum to JM21 to facilitate the operation of particular committees. These policies are in addition to the requirements set forth in JM21 and in no case shall these additions contradict or supersede the requirements in JM21. |
JM12B | Jun 2022 | view |
SOLID-STATE DRIVE (SSD) ENDURANCE WORKLOADS Terminology update, see Annex. This standard defines workloads for the endurance rating and endurance verification of SSD application classes. These workloads shall be used in conjunction with the Solid State Drive (SSD) Requirements and Endurance Test Method standard, JESD218. Also see JESD219A_MT and JESD219A_TT for the supporting trace files. |
JESD219A.01 | Jun 2022 | view |
SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD Terminology Update, see Annex. This standard defines JEDEC requirements for solid state drives. For each defined class of solid state drive, the standard defines the conditions of use and the corresponding endurance verification requirements. Although endurance is to be rated based upon the standard conditions of use for the class, the standard also sets out requirements for possible additional use conditions as agreed to between manufacturer and purchaser. Revision A includes further information on SSD Capacity. Items 303.19, 303.20, 303.21, 303.22, 303.23, 303.26, 303.27, 303.28, and 303.32 |
JESD218B.02 | Jun 2022 | view |
EXPANDED SERIAL PERIPHERAL INTERFACE (xSPI) FOR NONVOLATILE MEMORY DEVICES This standard specifies the eXpanded Serial Peripheral Interface (xSPI) for Non Volatile Memory Devices, which provides high data throughput, low signal count, and limited backward compatibility with legacy Serial Peripheral Interface (SPI) devices. It is primarily for use in computing, automotive, Internet Of Things (IOT), embedded systems and mobile systems, between host processing and peripheral devices. The xSPI electrical interface can deliver up to 400 MBytes per second raw data throughput. Item 1775.74. |
JESD251C | May 2022 | view |
DDR5 Unbuffered Dual Inline Memory Module (UDIMM) Common Standard This standard defines the electrical and mechanical requirements for 288-pin, 1.1 V (VDD), Unbuffered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR5 SDRAM UDIMMs). These DDR5 Unbuffered DIMMs (UDIMMs) are intended for use as main memory when installed in Computers. Item 2265.02B |
JESD308 | May 2022 | view |
Definition of the EE1002 and EE1002A Serial Presence Detect (SPD) EEPROMs Release No. 19.01. Item 1739.02E, Terminology update. This standard defines the specifications of interface parameters, signaling protocols, and features for Serial Presence Detect (SPD) EEPROMs as used for memory module applications. |
SPD4.1.3-01 | May 2022 | view |
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