JEDEC Plans to Update Popular Standard for Low Power Memory

JEDEC’s JC-42.6 Subcommittee for Low Power Memories is developing the next generation of its popular LPDDR memory standard: LPDDR6.  To significantly boost memory speed and efficiency for a variety of uses including mobile devices and AI, development plans for LPDDR6 include a focus on:

  • Increasing Bandwidth: To support AI applications and HPC use cases, various highfrequency enablers are being considered
  • Lowering Power Usage: LPDDR6 will continue to reduce power as compared to the prior version of the standard
  • Enhanced RAS (Reliability, Availability and Serviceability) to improve security and performance

As with all JEDEC standards development activities, industry participation is welcome. Learn more about membership and join today.

JEDEC standards are subject to change during and after the development process, including disapproval by the JEDEC Board of Directors.