JEDEC to Adopt FB-DIMM Specification

New Memory Architecture Features Greater Reliability, Improved Scalability, and Increased Bandwidth

Arlington, VA – May 4, 2006 – JEDEC today announced that it has formally approved the Fully Buffered Dual In-line Memory Module (FB-DIMM)) specification for publication. FB-DIMM represents a new memory architecture that is designed to provide enhanced reliability, greater bandwidth, improved scalability and a higher capacity per memory channel compared to current memory solutions.

According to the approved specification, FB-DIMMs utilize standard DDR2 memory and an on-DIMM Advanced Memory Buffer (AMB) chip to produce high-speed, point-to-point signaling and a fast serial bus channel between the memory and the host memory controller. This serial bus also enables a lower pin count for the controller and easier routing for multiple channels across the motherboard, compared to traditional parallel-based memory buses.

Future versions of the FB-DIMM will scale up to the higher frequencies provided by the DDR3 generation of DRAMs now being standardized by JEDEC.

JEDEC Board Chairman Mian Quddus (Samsung Semiconductor) said, "Fully Buffered DIMM represents an important new memory architecture, which JEDEC has carefully evaluated. With the ability to provide at least four times the capacity and significant bandwidth improvements over registered DIMMs, FB-DIMMs enable memory to keep pace with platform requirements, including increasingly faster processors, found in enterprise solutions."

JEDEC is the leading developer of standards for the solid-state industry. Almost 2700 participants, appointed by some 270 companies, work together in 50 JEDEC committees to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards that they generate are accepted throughout the world. All JEDEC standards are available online, at no charge. More information is available at