Memory Tutorial - A DDR5 Workshop Companion

Monday, October 7, 2019 • Santa Clara, CA

Monday, October 14, 2019 • Hsinchu, Taiwan

Covering every DRAM generation, this class is an essential prerequisite for prospective DDR5 Workshop attendees who do not have significant experience with DDR4 memory technology. The DDR5 Workshop will include detailed technical content that builds on previous generation devices and assumes that attendees are well-versed in previous generation memory technologies and standards.

Who Should Attend

All attendees of the DDR5 Workshop who do not already have an in-depth understanding of memory technology and/or memory interface design should also attend this session in order to maximize their comprehension of the material presented during the two-day DDR5 Workshop. This session should also be considered as a standalone class for those seeking an initial introduction to DRAM memory and memory systems.

Instructor

Desi Rhoden
Executive Vice President, Montage Technology Group
Chairman, JEDEC JC-42 Committee for Solid State Memories


Schedule

8:30AM Registered attendee check-in
9:30AM Morning session
Noon-1:00PM Lunch
1:00-4:30PM Afternoon session

About Mr. Rhoden

Desi Rhoden is a seasoned veteran in the semiconductor industry with over 30 years experience in a broad range of areas including memory and high performance systems. He serves as Executive Vice President at Montage Corporation, a Shanghai based company focused on Low Power, High Performance mixed signal devices including DDR4 Registers and Data Buffers, DDR3 Memory Buffers and Registers, Advanced Memory Buffers as well as Digital TV Tuners, Decoders, Receivers, Demodulators, and related DTV Devices.

Desi is Chairman of the JC-42 Memory Committee and the past Chairman of the Board for JEDEC, the world leader in standards and technology development for the semiconductor industry. Desi’s involvement in JEDEC has continued for over 30 years throughout his other positions in the industry. He also serves as a liaison with Chinese organizations and industry where he promotes JEDEC standards and the semiconductor industry.

Previously Desi was Executive Vice President at Inphi Corporation, a company focused on high performance analog devices including Registers, PLLs, and Ultra High Performance Communication Devices.

Prior to Inphi, Desi was President/CEO of Advanced Memory International Inc. (AMI2), where he coordinated the industry wide infrastructure development and promotion of standard memory technologies including PC133, DDR, and DDR2. Methodologies developed as part of AMI2, such as the coordinated development of publicly available reference gerber files for DRAM Modules (DIMMs), have been transferred into JEDEC as standard industry practices.

Prior to AMI2, Desi was a Fellow at VLSI Technology where he also held several management positions. Prior to joining VLSI, he was a Scientist at Hewlett Packard.

Desi has Bachelors and Masters degrees in Electrical Engineering from Colorado State University.

When not traveling, Desi resides in Austin Texas, where he enjoys running, hiking and cutting cedar.