Global Standards for the Microelectronics Industry
Automotive Electronics Forum
Wednesday, September 6 • San Jose, CA
Program Moderator: Charles Furnweger, JEDEC | |
8:00-8:05AM | ![]() JEDEC Welcome |
Morning Session | |
8:05-8:25AM Keynote | ![]() Driving Memory and Storage for Smart-Intelligent and Safe-Secure VehiclesKeynote Presenter: Uksong Kang, SK hynix With rapid transition towards autonomy and electrification in automobiles, importance of high-performance and robustness in computing systems in vehicles are growing more than ever before. In order to achieve such goals, four key factors “Smartness, Intelligence, Safety, and Security” need to be considered. And, memory and Storage constitutes an important part of computing systems to satisfy such needs. First for smartness, such as in smart cockpits, high-performance memory and high-capacity storage are required. Second for intelligence, such as in self-driving and ADAS, high-bandwidth low-power memory is essential. Third for safety, high fault-tolerant memory and storage having high RAS capability with auto-grade quality are needed. Finally for Security against external intrusion, adoption of secure features in memory and storage would be necessary. In this presentation, we explain how each of these goals can be achieved using memory and storage tailored to such individual needs.
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8:25-8:45AM
| ![]() Computational Chips for Automotive ADAS/AD Applications: How to Build a High-Performance, Automotive-Safe ChipPresenter: Jeffrey Chung, Cadence and JEDEC Automotive Steering Committee Chair Automotive-safe semiconductors have been in vehicles for a long time, and were previously used for important but lower-level functions like braking, drivetrain and cruise control. The latest chips being designed for Advanced Driver Awareness Systems (ADAS) and Autonomous Driving (AD) applications are very different, requiring a large amount of compute power and memory bandwidth, while remaining automotive safe. This presentation will discuss the fundamentals of creating an automotive safe chip, from aligning the organization to operate in a functionally safe way, to reasonable targets for ISO26262 and AEC Q100 automotive standards, and achieving success at functional safety audit. |
8:45-9:05AM
| ![]() Automotive Memory & the Opportunities within JEDEC StandardizationPresenter: Hung Vuong, Qualcomm Coming soon |
9:05-9:25AM
| ![]() Memory System Requirements in Automotive FunctionsPresenter: Prasun Raha, Rivian A modern Electric Vehicle (EV) is essentially a computer on wheels with a variety of complex compute domains that have a set of constraints unique to each domain. This talk looks explores the basic functionality of these compute domains and how the attributes of the memory subsystems vary with the workloads. |
9:25-9:45AM | ![]() NVM on the LPDDR InterfacePresenter: Cliff Zitlaw, Infineon Next-generation automotive ecosystems present a difficult set of requirements for consideration by chipset developers. Dramatically higher computing requirements, operation at elevated temperatures and the migration to advanced process nodes all need evaluation. This session discusses these automotive ecosystem requirements and the effort to place non-volatile memory on the widely adopted JEDEC LPDDR interface to address this challenging environment |
9:45-10:05AM
| ![]() Automotive High Performance MCU and ADAS Processors- System Challenges with Memory (Flash/DDR) Presenter: Jason Jones, TI There is an exponential rise in compute needs in ADAS for Automoted driving as well as ECU Consolidation in MCU space for new Zonal EE architectures, which is driving a new generation of MCU and processors in Automotive space. This poses new demands on memory especially DRAM technology as well as flash (NAND/NOR). This presentation discusses technology trends for various ECU and density neeeds. The automotive market poses additional challenges related to cost and thermal aspects. The talk focuses on two of these challenges, namely thermal challenges with LPDDR4 and performance challenges with eXecuteInPlace (XIP) for NOR flash. |
10:05-10:25AM | ![]() ZVEI Robustness Validation Process for Assessing Semiconductor IC Mission ProfilesPresenter: Ron Eller, Texas Instruments Inc. AS THE AUTOMOTIVE INDUSTRY transitions manufacturing from the cars with combustion engines to electric vehicles (EV), a dramatic increase in the requested power-on hours (POH) required for semiconductor ICs is also occurring. |
10:25-10:45AM | ![]() IP in the Automotive EnvironmentPresenter: Ron DiGiuseppe, Synopsys Coming soon |
10:45-11:00AM | Break |
11:00-11:20AM | ![]() Driving Connectivity: Navigating the Roadmap of MIPI’s Automotive Solutions for Next-Gen VehiclesPresenter: Kevin Yee, Samsung and Chair of the MIPI Marketing Steering Group Driving Connectivity: Navigating the Roadmap of MIPI’s Automotive Solutions for Next-Gen Vehicles The presentation will provide a brief introduction to MIPI Alliance, history of MIPI’s liaison activities with JEDEC in support of UFS and Module Sideband Bus, and use of existing MIPI specifications in automotive products. It will provide an update on the latest development and status of MIPI Automotive SerDes Solutions (MASS), a full-stack automotive connectivity solution for integrating advanced image sensors and displays with end-to-end functional safety and security built in. It will lead in to the subsequent MIPI presentation - “Emerging Cybersecurity in Wired Connectivity Standards”. |
11:20AM-NOON | Panel Discussion |
NOON-1:00PM | Lunch Break |
Afternoon Session | |
1:00-1:30PM Keynote | ![]() Emerging Cybersecurity in Wired Connectivity StandardsKeynote Presenter: Rick Wietfeldt, Qualcomm and MIPI Alliance This presentation will review the emerging requirements and developments of security in wired connectivity interfaces, with a focus on identifying a “checklist” for understanding the main features of a security framework. As a concrete example, we describe the ongoing work in MIPI Alliance to leverage the DMTF SPDM specification to secure the connectivity between automotive sensors and the central processing SoC for secured automated driving (ADAS/AD). | 1:30-1:50PM Keynote | ![]() Quality and Reliability Challenges in the EV/AV EraKeynote Presenter: Federico Tiziani, Micron Starting from an introduction of Micron 30 years commitment to the automotive market and major milestones, the presentation will go through the Micron Foundations of Quality and the evolution from internal combustion engine to the electrical vehicles mission profiles and usage models. |
1:50-2:10PM Keynote | ![]() Driving Intelligent Mobility and Fueling the Evolution of Automotive IndustryKeynote Presenter: Jim Elliott, Samsung Coming soon |
2:10-2:30PM Keynote
| ![]() Electronic Components for e-Mobility ArchitecturesKeynote Presenter: Alex Popovic, ST Coming soon |
2:30-2:50PM | ![]() Memory Architectures in an Autonomous WorldPresenter: Vasanth Waran, Renesas The explosion of data traffic makes data center/cloud computing workloads demand to grow exponentially. The data center processors are seeing mixture of file sizes, diversified data types and new algorithms for varying processing requirements. Adding to the challenge is the workload evolution, with cloud-based ML/AI (Hardware Machine Learning & Artificial Intelligence) being the first and foremost. The processing speed and bandwidth demand increase the data center burden. Example workloads targeted for acceleration are data analytics, networking application and cybersecurity. Adaptable system accelerator, such as implemented with FPGA, have bridged the computational gap by providing heterogenous acceleration to offload the burden. However, the new data path, such as in ML, is fundamentally different from the traditional CPU data path flow.
This presentation will highlight the diverse applications of programmable system and contrast the different system memory (e.g., DDR5) requirement to traditional CPU system requirement. The discussion will stress on the balance among system cost, bandwidth and memory density requirement going forward.
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2:50-3:00PM | Break |
3:00-3:20PM | ![]() ![]() Evolution Behind the Steering Wheel: The Paradigm Shift at the Core of Your Next Self-Driving CarPresenter: Rohit Bhola & Donovan Hwang, Samsung This presentation covers architecture evolution for In-Vehicle Infotainment (IVI) and Advanced Driver Assist Systems (ADAS) systems that the Automotive Industry is undergoing to deliver the next level of experiences to drivers and passengers. It covers the Market trends driving this change and also focuses on technology enabling it. |
3:20-3:40PM | ![]() Case for Standardized Mission Profiles for AutomotivePresenter: Peter Turlo, onsemi The transition from the legacy Internal Combustion Engine (ICE) to the contemporary Battery Electric Vehicle (BEV) automotive platforms resulted in the development of automotive electronic systems not previously employed in ICE applications. Along with proliferation of control systems supporting various functions related to sensing and connectivity resulted in an exponential growth of electronic content in contemporary automotive platforms that can be subjected to use conditions that can differ from the legacy use conditions originally developed for ICE platforms. Years of collective industry ICE platform knowledge enabled the standardization of the qualification procedures applied to automotive semiconductor products; facilitating an efficient and cost effective semiconductor product development and qualification process supporting the deployment of (non-ASIC) catalog products destined for the general automotive market. Today, the multiple iterations of yet to be standardized contemporary use conditions provided by multiple end-users for similar end applications are causing inefficiencies in the product development and qualification process. The presentation will speak to the concept of Standardized Mission Profiles as applied to some of the automotive applications seen in contemporary automotive platforms. |
3:40-4:15PM | Panel Discussion |
Program, topics and speakers subject to change without notice.