Automotive Electronics Forum

This presentation explores the transformative role of "Autonomous Physical AI" in the evolving landscape of artificial intelligence and memory solutions, with a specific focus on Samsung's advancements. The discussion begins with a historical overview of memory applications, highlighting the shift from PCs to mobile devices, and now to server/cloud environments. By 2027, the rise of Level 3 autonomous driving is anticipated to make automotive applications central to memory usage, marking the advent of "AI on Wheels."
The presentation delves into how autonomous vehicles are generating substantial data, necessitating increased memory bandwidth and density. As autonomous driving levels advance, memory requirements are projected to double in bandwidth and density, with Level 5 autonomy potentially increasing data usage fourfold. The forecast indicates that by 2033, DRAM memory in autonomous vehicles could constitute around 40% of the total market.
Key market segments for memory solutions include automotive data centers, robotics, and LEO satellites, with significant market expansions projected in these areas. Samsung's memory solutions are highlighted using the P.O.W.E.R. framework—Proactive World-first Solution Provider, Operational Excellence, Wholistic In-house Solutions, Enduring Supply Stability, and Reliable Partner. This framework underscores Samsung's leadership in innovative memory products, including automotive-grade DRAM, LPDDR5X, and GDDR7, along with its strategic participation in UCIe standardization for modular semiconductor connections.
The presentation also covers the evolution towards Software-Defined Vehicles (SDVs) and centralized architectures, emphasizing the increasing demand for replaceable and detachable storage solutions. Samsung is preparing for these changes with advanced products such as high-capacity SSDs and memory solutions optimized for next-generation vehicle architectures. The session concludes with an introduction to Samsung’s Global Automotive One Team, dedicated to driving forward its vision in automotive memory solutions.

Chris will present the major trends driving bandwidth and leading edge technology in DRAM and key thoughts for the future -- what’s next?

Coming soon

The next generations of vehicles promise to include an increasing level of artificial intelligence, communications, input sensor processing, entertainment including media streaming, and of course the control and monitoring of a network of electrical resources. The traditional S-curves for technology adoption have shrunken from 7 years to 18 months – how will designers keep up with these trends? CXL adoption, already under way in data centers, provides insight into the value of a general purpose bus that virtualizes processing, memory, storage, and communications, all the key elements needed to provide a flexible architecture that can track changing requirements. Suppliers can leverage the commonalities between data centers and automotive to broaden the market for their devices, and lower the cost for all.

Coming soon

Next-generation automotive ecosystems present a difficult set of requirements for consideration by chipset developers. Dramatically higher computing requirements, operation at elevated temperatures and the migration to advanced process nodes all need evaluation. This session discusses these automotive ecosystem requirements and the effort to place non-volatile memory on the widely adopted JEDEC LPDDR interface to address this challenging environment

This presentation will explore the three primary memory technologies used in most AI applications: LPDDR5X, GDDR6, and HBM3 DRAM. We’ll delve into their advantages and how they integrate into automotive applications. Additionally, we’ll discuss which memory subsystems are best for next-generation automotive systems and key considerations when evaluating Automotive Memory Interface IP. Finally, we’ll look ahead to potential DRAM technologies for building future AI automotive applications.

Safety is an important aspect of all Automotive applications spanning from Vehicle control systems, HMI systems and Autonomy. While the compute platforms in a modern automotive system adopt a lot of aspects of a modern computer, there are key aspects from safety guidelines that modify and influence the design of these compute systems and the corresponding memory interfaces. This talk will touch upon some examples of how these guidelines are derived and the key attributes of the memory system that can result in a successful design of a “safe computer”.

Conventional passenger cars have a lifetime of ~8000 hours associated with two main categories of mission profiles: driving and parking. Electric Vehicles (EVs), with their new features and uses, require an additional category of mission profiles to be considered, such as (bidirectional) charging or active during parking. This implies much longer usage. Classical product qualification methods have difficulties to prove these extended lifetimes by accelerated lifetime tests while keeping the test time and costs within the required range. To overcome the shortcomings of conventional qualification tests, improving the prediction of Remaining Useful Lifetime (RUL) is a central concern that requires Extended Mission Profiles (EMPs) formalization, Wide BandGaps (WBG) devices ageing models validated in application, identification of critical parameters impacted by this failure mechanisms, diagnostic sensing techniques and system lifetime prediction models to be put in place to enable Condition and Health Monitoring (CHM). In this talk, an overview of these concepts will be presented, including a gap analysis between new requirements and existing and evolving standards that contribute to the qualification of EMPs and WBG devices for the EV industry.

In the era of AI, new use cases equipped with AI functions are emerging in various application fields including server, mobile, consumer, and automotive. Among these, automotive is pioneering such AI use cases, with AI inferencing being adopted in ADAS, and LLM-based on-device AI being adopted in cockpit. Furthermore, through autonomous driving, automotive is becoming the first to commercialize robotics, which is in the spotlight as an emerging application of the future. In order to make these systems intelligent, a high-performance SoC is required, where high bandwidth, large capacity, and low-power memory and storage are essential. This presentation introduces automotive memory and storage products that can satisfy the various requirements of these applications, as well as their technology and development directions.

Join us for a presentation on Waymo's remarkable progress in autonomous driving. We're now providing over 50,000 rider-only trips per week across multiple cities, with no human driver behind the wheel. We'll share insights into the launch and operation of the world's first fully autonomous ride-hailing service, offering a glimpse into the future of transportation. In addition, we'll provide an overview of the memory technologies that underpin our autonomous vehicles. We'll explore the specific requirements for flash and DRAM in this demanding environment, and discuss how we see memory needs evolving as autonomous vehicles become more prevalent.

As the automotive industry evolves towards increasingly sophisticated and connected vehicles, the demand for advanced, reliable, and high-performance communication interfaces has never been greater. Explore the pivotal role that MIPI specifications play in shaping the next generation of automotive architectures and the collaborative efforts with JEDEC in defining and refining standards to ensure interoperability and support for emerging technologies like autonomous driving and V2X (Vehicle-to-Everything) communication.

JEDEC has successfully standardized DDR5 DIMM PMICs for both server and client computing. With LPDDR memory having low power consumption, high speed, and reliability, its use in automotive applications, such as self-driving vehicles and Advanced Driver Assistance Systems (ADAS), has become essential. High performance memory and advanced power solutions are critical in meeting the demands of increasingly sophisticated and data-intensive automotive technologies. We would like to propose having standardized power solutions for down memory, starting with LPDDR in automotive. We will present examples of existing solutions to demonstrate that standardizing power solutions for memory in automotive applications enhances compatibility, scalability, safety, performance, efficiency, and reliability, ultimately contributing to the advancement and adoption of autonomous driving and ADAS technologies.

Automotive architecture has evolved rapidly over the past 5 years as vehicles incorporated new infotainment and advanced driver assistance features. This trend will continue as manufactures move towards ever more sophisticated and advanced functionality. This session discusses the trends driving future automotive architectures and the memory/storage products needed to realize these systems.

Aaron will present a break-down of DRAM failure modes and associated FIT contribution as relevant to system ASIL targets. He will further discuss implications of DRAM failure modes with respect to common ECC techniques at the system level.

GaN devices have shown great promise in improving efficiency in power conversion and is rapidly entering the consumer market. The role of GaN in automotive applications such as traction inverters is currently limited by concerns over reliability. The importance of choosing the appropriate GaN technology as well as the application of this technology is important. This paper will cover the reliability evaluations that high reliability high power devices need to meet the automotive needs and requirements.

As autonomous driving continues to take hold in the automotive market, increasingly automotive vendors are adopting to faster LPDDR technologies much earlier in the overall LPDDR technology life cycle. No longer can the automotive industry be satisfied with more stable, more mature technologies, but rather they must move quickly to adapt the faster technologies so they can be quicker in their deployment of the latest autonomous technologies. Of course faster adoption comes with many price tags and one that might not be top of mind is the fact that with faster technologies, comes an entirely new set of testing challenges. Test engineers now must understand how equalization, de-embedding and even receiver calibration must be done to successfully test tomorrow’s automotive designs. This lecture will discuss these testing challenges, various test equipment (BERT versus AWG) and what can be done to prepare your testing needs for next generation LPDDR technologies.