Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
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Part Model Guidelines for Electronic-Device Packages – XML Requirements |
JEP30E | Aug 2024 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It covers several sub-sections such as electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the parental structure, under which several sub-section listed above, can be contained and linked together within the Part Model parent structure. For more information visit the main JEP30 webpage. Free download. Registration or login required. |
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SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD |
JESD218B.03 | Aug 2024 |
Terminology Update, see Annex. This standard defines JEDEC requirements for solid state drives. For each defined class of solid state drive, the standard defines the conditions of use and the corresponding endurance verification requirements. Although endurance is to be rated based upon the standard conditions of use for the class, the standard also sets out requirements for possible additional use conditions as agreed to between manufacturer and purchaser. Revision A includes further information on SSD Capacity. Items 303.19, 303.20, 303.21, 303.22, 303.23, 303.26, 303.27, 303.28, and 303.32 Committee(s): JC-64.8 Available for purchase: $76.00 Add to Cart Paying JEDEC Members may login for free access. |
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Part Model Package Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-P100E | Aug 2024 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the "Package" subsection of the Part Model. For more information visit the main JEP30 webpage. Free download. Registration or login required. |
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MCP and Discrete e•MMC, e•2MMC, and UFSRelease Number: 33 |
MCP3.12.1-1 | Jun 2024 |
Item 142.12 This section provides electrical interface items related to Multi-Chip Packages (MCP) and Stacked-Chip Scale Packages (SCSP) of mixed memory technologies including Flash (NOR and NAND), SRAM, PSRAM, LPDRAM, USF, etc. These items include die-on-die stacking within a single encapsulated package, package-on-package or module-in-package technologies, etc. The Section also contains Silicon Pad Sequence information for the various memory technologies to aid in the design and electrical optimization of the memory sub-system or complete memory stacked solution.
Committee(s): JC-64.2 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPI Safety Extensions (CRC) for Non Volatile SPI Flash Memories (QPI and xSPI) |
JESD255 | Mar 2024 |
The JESD255 document defines CRC modes supported with 8-bit aligned and 16-bit aligned data transactions. It is limited to logical bus transactions and does not cover the electrical properties of the IO bus. Free download. Registration or login required. |
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XFM Device, Version 2.0 |
JESD233A | Dec 2023 |
This standard specifies the mechanical and electrical characteristics of the XFM removable memory Device. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Free download. Registration or login required. |
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Universal Flash Storage (UFS) File Based Optimizations (FBO) Extension |
JESD220-4 Version 1.01 | Nov 2023 |
This standard specifies the extension specification of the UFS electrical interface and the memory device. PLEASE NOTE: Revision and renumbering of JESD231 Version 1.0, August 2022 Free download. Registration or login required. |
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Zoned Storage for UFS |
JESD220-5 | Nov 2023 |
The purpose of this standard is to describe Zoned Storage for UFS, which enables higher bandwidth, lower latency and to reduce write amplification. Patents(): Huawei 201911209032.1; 116166570,A Memory Technologies LLC 101952808 104657284 2248023 3493067 602009056490.0 602009064847.0 HK1210296 5663720 6602823 10-1281326 10-1468824 2248023 3493067 2248023 3493067 8307180 8601228 9063850 9367486 10540094 11550476 Free download. Registration or login required. |
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Secure Serial Flash Bus TransactionsRelease Number: Version 1.0 |
JESD254 | Dec 2022 |
This standard describes SPI bus transactions intended to support Secure Flash operation on a serial memory device. The on-chip SFDP database described in JESD216 has been revised to include details about the secure transactions. This ballot does not describe the SFDP revisions or the secure packet structure. Patents(): Infineon- US 10868679B1 and Micron- US 9009394B2 Free download. Registration or login required. |
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Automotive Solid State Drive (SSD) Device StandardRelease Number: 1.0 |
JESD312 | Nov 2022 |
This standard defines the specifications of interface parameters, signaling protocols, environmental requirements, packaging, and other features for a solid state drive (SSD) targeted primarily at automotive applications. Free download. Registration or login required. |
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Universal Flash Storage (UFS) File Based Optimizations (FBO) Extension, Version 1.0Status: Superseded |
JESD231 | Aug 2022 |
JESD231 was superseded by the renumbered JESD220-4 Version 1.01. Committee(s): JC-64.1 |
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UNIVERSAL FLASH STORAGE, Version 4.0 |
JESD220F | Aug 2022 |
This document replaces all past versions, however JESD220E, January 2020 (V 3.1), is available for reference only. This standard specifies the characteristics of the UFS electrical interface and the memory device. Such characteristics include (among others) low power consumption, high data throughput, low electromagnetic interference and optimization for mass memory subsystem efficiency. The UFS electrical interface is based on an advanced differential interface by MIPI M-PHY specification which together with the MIPI UniPro specification forms the interconnect of the UFS interface. Committee(s): JC-64.1 Available for purchase: $369.00 Add to Cart Paying JEDEC Members may login for free access. |
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Universal Flash Storage Host Controller Interface (UFSHCI), Version 4.0 |
JESD223E | Aug 2022 |
This standard describes a functional specification of the Host Controller Interface (HCI) for Universal Flash Storage (UFS). The objective of UFSHCI is to provide a uniform interface method of accessing the UFS hardware capabilities so that a standard/common Driver can be provided for the Host Controller. The common Driver would work with UFS host controller from any vendor. This standard includes a description of the hardware/software interface between system software and the host controller hardware. It is intended for hardware designers, system builders and software developers. This standard is a companion document to [UFS], Universal Flash Storage (UFS). The reader is assumed to be familiar with [UFS], [MIPI-UNIPRO], and [MIPI-M-PHY]. Item 206.25 Committee(s): JC-64.1 Available for purchase: $163.00 Add to Cart Paying JEDEC Members may login for free access. |
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SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP)This document replaces JESD216F.01, Editorial changes to this document were approved by the TG, June 2022 |
JESD216F.02 | Jun 2022 |
The Serial Flash Discoverable Parameter (SFDP) standard provides a consistent method of describing the functional and feature capabilities of serial flash devices in a standard set of internal parameter tables. These parameter tables can be interrogated by host system software to enable adjustments needed to accommodate divergent features from multiple vendors. Any company may request a Function Specific ID by making a request to the JEDEC office at juliec@jedec.org. Please include “Function Specific ID Request, JESD216” in the email subject line. Item 1775.73. Editorial changes listed in Annex, from original publication of JESD216F (December 2021). Committee(s): JC-42.4 Free download. Registration or login required. |
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SOLID-STATE DRIVE (SSD) ENDURANCE WORKLOADS |
JESD219A.01 | Jun 2022 |
Terminology update, see Annex. This standard defines workloads for the endurance rating and endurance verification of SSD application classes. These workloads shall be used in conjunction with the Solid State Drive (SSD) Requirements and Endurance Test Method standard, JESD218. Also see JESD219A_MT and JESD219A_TT for the supporting trace files. Free download. Registration or login required. |
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Registration - Enclosure Form Factor for Automotive SSD Connector, Cable Mount |
SO-029A | Jan 2022 |
Designator: PBXC-K4_D#p##-MR36p05x14p5Z10p25-HS
Item: 11.14-210, Access STP Files for SO-029A Cross Reference: MO-348 Committee(s): JC-11.14 Free download. Registration or login required. |
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ENCLOSURE FORM FACTOR FOR SSD DEVICES, VERSION 1.0 |
JESD253.01 | Aug 2021 |
This document specifies the enclosure form factor which can be used with various type of SSD devices: outline of the top and bottom enclosure, three screw holes to mount the enclosure on the system, and two clamping holes in the top enclosure to lock to the connector. Item 318.06. This is a minor editorial revision detailed in Annex D. Committee(s): JC-64.8 Free download. Registration or login required. |
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240-Pin PC2-5300/PC2-6400 DDR2 SDRAM Unbuffered DIMM Design Specification |
MODULE4.20.13 | May 2021 |
Release 31. Item 2167.05 This revision contains terminology updates only. Committee(s): JC-45, JC-45.2, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SYSTEM LEVEL ESD: PART II: IMPLEMENTATION OF EFFECTIVE ESD ROBUST DESIGNSThis is an editorial revision, details can be found in Annex F. |
JEP162A.01 | Jan 2021 |
This document, while establishing the complex nature of System Level ESD, proposes that an efficient ESD design can only be achieved when the interaction of the various components under ESD conditions are analyzed at the system level. This objective requires an appropriate characterization of the components and a methodology to assess the entire system using simulation data. This is applicable to system failures of different categories (such as hard, soft, and electromagnetic interference (EMI)). This type of systematic approach is long overdue and represents an advanced design approach which replaces the misconception, as discussed in detail in JEP161, that a system will be sufficiently robust if all components exceed a certain ESD level. Free download. Registration or login required. |
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UNIVERSAL FLASH STORAGE (UFS) CARD EXTENSION, Version 3.0 |
JESD220-2B | Nov 2020 |
This standard specifies the characteristics of the UFS card electrical interface and the memory device. This document defines the added/modified features in UFS card compared to embedded UFS device. For other common features JESD220, UFS, will be referenced. Patents(): Samsung: US D727910, US D736212, US D736215, US D736214, US D736213, US 29/546125, US 29/546150 Committee(s): JC-64.1 Available for purchase: $76.00 Add to Cart Paying JEDEC Members may login for free access. |