Global Standards for the Microelectronics Industry
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Displaying 1 - 3 of 3 documents.
Title | Document # | Date |
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ENVIRONMENTAL ACCEPTANCE REQUIREMENTS FOR TIN WHISKER SUSCEPTIBILITY OF TIN AND TIN ALLOY SURFACE FINISHEDStatus: Reaffirmed May 2014, January 2020 |
JESD201A | Sep 2008 |
The methodology described in this document is applicable for environmental acceptance testing of tin based surface finishes and mitigation practices for tin whiskers. This methodology may not be sufficient for applications with special requirements, (i.e., military, aerospace, etc.). Additional requirements may be specified in the appropriate requirements (procurement) documentation. Free download. Registration or login required. |
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MEASURING WHISKER GROWTH ON TIN AND TIN ALLOY SURFACE FINISHESStatus: Reaffirmed May 2014, September 2019 |
JESD22-A121A | Jul 2008 |
The predominant terminal finishes on electronic components have been Sn-Pb alloys. As the industry moves toward Pb-free components and assembly processes, the predominant terminal finish materials will be pure Sn and alloys of Sn, including Sn-Bi and Sn-Ag Pure Sn and Sn-based alloy electrodeposits and solder-dipped finishes may grow tin whiskers, which could electrically short across component terminals or break off the component and degrade the performance of electrical or mechanical parts. Free download. Registration or login required. |
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STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS |
JESD47L | Dec 2022 |
This standard describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed. Available for purchase: $87.38 Add to Cart Paying JEDEC Members may login for free access. |