Global Standards for the Microelectronics Industry
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Document # | Date |
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WIDE I/O 2 (WideIO2) |
JESD229-2 | Aug 2014 |
This standard defines Wide I/O 2 (WideIO2), including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 8 Gb through 32 Gb SDRAM devices with 4 or 8 64-bit wide channels using direct chip-to-chip attach methods for between 1 and 4 memory devices and a controller/buffer device. The WideIO2 architecture is an evolution of the WIO architecture to enable bandwidth scaling with capacity. Committee(s): JC-42.6 Free download. Registration or login required. |
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SPD General Standard. |
SPD4.1.2 | Jul 2008 |
Release No. 19. Item 2065.26 Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 6Release Number: 30 |
SPD4.1.2.L-6 | Nov 2020 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 6. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01H.
Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 5Release Number: 29 |
SPD4.1.2.L-5 | Aug 2019 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 5. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2276.05. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 3Release Number: 25 |
SPD4.1.2.L-3 | Sep 2015 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. The following SPD fields will be documented in the order presented in section 1.1 with the exception of bytes 128~255 which are documented in separate annexes, one for each family of module types. Further description of Byte 2 is found in Annex A of the SPD standard. Item 2220.01F. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 2Release Number: 23A |
SPD4.1.2.L-2 | Jan 2014 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 2. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. (This release is editorial changes only). Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 1Release Number: 23 |
SPD4.1.2.L-1 | Nov 2013 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 1. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01 Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex L, Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 4Release Number: 27A |
SPD4.1.2.L-4 | Aug 2019 |
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 4. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01G. This is an editorial revision to the publication in January 2017. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex K - Serial Presence Detect (SPD) for DDR3 SDRAM Modules, Release 6 |
SPD4.1.2.11 | Feb 2014 |
Release No. 24. Item 2065.47A Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex G, Serial Presence Detect for FBDIMM, Revision 1.1 |
SPD4.1.2.7 | Jun 2006 |
Release No. 16A. Item 2003.02A Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Serial Presence Detect (SPD) Table of Contents |
SPD4.1.TOC | Mar 2010 |
Release No. 19 Committee(s): JC-42.3, JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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R/C U, in 240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800 DDR3 SDRAM Registered DIMM Design Specification |
MODULE4.20.20.U | Sep 2012 |
Release 22. Item 2145.37 Committee(s): JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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R/C M, in 240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification |
MODULE4.20.23.M | Jan 2013 |
Release No. 22 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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R/C AD, in 240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification |
MODULE4.20.23.AD | Jan 2013 |
Release No. 22 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PRELIMINARY RELEASE FOR JESD21: DDR3 MINI-UDIMM RC F0(x8 2R, STACKED) |
PRN13-NM1 | Oct 2013 |
Item No. 2229.01 (JC-45.3-11-523, JCB-11-102) Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PRELIMINARY RELEASE FOR JESD21: DDR3 MINI-RDIMM ANNEX D (x8 2R, Planar) |
PRN13-NM3 | Oct 2013 |
Item No. 2207.14 (JC-45.1-12-284, JCB-12-63) Committee(s): JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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PC-2700/PC-3200 Registered DIMM Design Specification Revision 2.2 |
MODULE4.20.7 | May 2021 |
Release 31. Item 2029.04 This revision contains terminology updates only. JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Part Model Electrical Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-E100G | Feb 2025 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, Electrical, assembly process classification data along with materials and substances that may be present in the supplied product or subproducts. This Guideline specifically focuses on the “Electrical” sub-section of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-16 Free download. Registration or login required. |
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LRDIMM DDR3 MEMORY BUFFER (MB) |
JESD82-30.01 | Jan 2023 |
Terminology update. The Load Reduced DIMM (LRDIMM) Memory Buffer (MB) supports DDR3 SDRAM main memory. The Memory Buffer allows buffering of memory traffic to support large memory capacities. Unlike DDR3 Register Buffer (SSTE32882), which only buffers Command, Address, Control and Clock, the LRDIMM Memory Buffer also buffers the Data (DQ) interface between the Memory Controller and the DRAM components. Free download. Registration or login required. |
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LPDDR5/5X Serial Presence Detect (SPD) ContentsRelease Number: 1.0 |
JESD406-5A | Nov 2024 |
This publication describes the serial presence detect (SPD) values for all LPDDR5/5X memory modules. In this context, “modules” applies to memory modules like traditional Dual In-line Memory Modules (DIMMs) or solder-down motherboard applications. The SPD data provides critical information about all modules on the memory channel and is intended to be use by the system's BIOS in order to properly initialize and optimize the system memory channels. The storage capacity of the SPD non-volatile memory is limited, so a number of techniques are employed to optimize the use of these bytes, including overlays and run length limited coding. Committee(s): JC-45 Free download. Registration or login required. |