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Displaying 1 - 3 of 3 documents.

Title	Document #	Date
LOW POWER DOUBLE DATA RATE 5 (LPDDR5) Status: Superseded JESD209-5A, January 2020	JESD209-5	Feb 2019
This document has been replaced by JESD209-5A. Members of JC-42.6 may access a reference copy on the restricted members' website. Committee(s): JC-42.6
LOW POWER DOUBLE DATA RATE (LPDDR5) Status: Superseded July 2021	JESD209-5A	Jan 2020
This document has been replaced by JESD209-5B. Item 1854.99A. Members of JC-42.6 may access a reference copy on the restricted members' website. Committee(s): JC-42.6
LOW POWER DOUBLE DATA RATE (LPDDR) 5/5X	JESD209-5C	Jul 2023
This document defines the LPDDR5/LPDDR5X standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for a JEDEC compliant x16 one channel SDRAM device and x8 one channel SDRAM device. LPDDR5/LPDDR5X device density ranges from 2 Gb through 32 Gb. This document was created using aspects of the following standards: DDR2 (JESD79-2), DDR3 (JESD79-3), DDR4 (JESD79-4), LPDDR (JESD209), LPDDR2 (JESD209-2), LPDDR3 (JESD209-3), and LPDDR4 (JESD209-4). Committee(s): JC-42, JC-42.6 Available for purchase: $459.00 Add to Cart To help cover the costs of producing standards, JEDEC is now charging for non-member access to selected standards and design files. Most of the content on this site remains free to download with registration. Paying JEDEC member companies enjoy free access to all content. Learn more and apply today. Paying JEDEC Members may login for free access.