Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
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JOINT JEDEC/ESDA STANDARD FOR ELECTROSTATIC DISCHARGE SENSITIVITY TEST - HUMAN BODY MODEL (HBM) - DEVICE LEVEL |
JS-001-2024 | Oct 2024 |
This standard establishes the procedure for testing, evaluating, and classifying components and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined human body model (HBM) electrostatic discharge (ESD). The purpose (objective) of this standard is to establish a test method that will replicate HBM failures and provide reliable, repeatable HBM ESD test results from tester to tester, regardless of component type. Repeatable data will allow accurate classifications and comparisons of HBM ESD sensitivity levels. NOTE Data previously generated with testers meeting all waveform criteria of ANSI/ESD STM5.1-2007 or JESD22A-114F shall be considered valid test data. Also available JTR-001-01-12: User Guide of ANSI/ESDA/JEDEC JS-001, Human Body Model Testing of Integrated Circuits Free download. Registration or login required. |
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NAND Flash Interface Interoperability |
JESD230G | Oct 2024 |
This standard was jointly developed by JEDEC and the Open NAND Flash Interface Workgroup, hereafter referred to as ONFI. This standard defines a standard NAND flash device interface interoperability standard that provides means for system be designed that can support Asynchronous SDR, Synchronous DDR and Toggle DDR NAND flash devices that are interoperable between JEDEC and ONFI member implementations. Free download. Registration or login required. |
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DDR5 262 Pin SODIMM Connector Performance Standard |
PS-006B | Sep 2024 |
This standard defines the form, fit and function of SODIMM DDR5 connectors for modules supporting channels with transfer rates 6.4 GT/S and beyond. It contains mechanical, electrical and reliability requirements for a one-piece connector mated to a module with nominal thickness of 1.20 mm. The intent of this document is to provide performance standards to enable connector, system designers and manufacturers to build, qualify and use the SODIMM DDR5 connectors in client and server platforms. Item 14-226 Free download. Registration or login required. |
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STANDARD MANUFACTURERS IDENTIFICATION CODE |
JEP106BK | Sep 2024 |
The manufacturers identification code is defined by one or more 8 bit fields, each consisting of 7 data bits plus 1 odd parity bit. The manufacturers identification code is assigned, maintained and updated by the JEDEC Office. The intent of this identification code is that it may be used whenever a digital field is required, e.g., hardware, software, documentation, etc. To make a request for an ID Code please go to https://www.jedec.org/standards-documents/id-codes-order-form Free download. Registration or login required. |
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Graphics Double Data Rate 7 SGRAM Standard (GDDR7) |
JESD239A | Sep 2024 |
This standard defines the Graphics Double Data Rate 7 (GDDR7) Synchronous Graphics Random Access Memory (SGRAM) specification, including features, functionality, package, and pin assignments.
Free download. Registration or login required. |
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Wire Bond Pull Test Methods |
JESD22-B120.01 | Sep 2024 |
This test method provides a means for determining the strength and failure mode of a wire bonded to, and the corresponding interconnects on, a die or package bonding surface and may be performed on pre-encapsulation or post-encapsulation devices. Free download. Registration or login required. |
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JEDEC® Memory Controller Standard – for Compute Express Link® (CXL®) |
JESD319 | Sep 2024 |
This standard defines the overall specifications, interface parameters, signaling protocols, and features for a CXL® Memory Controller ASIC. The standard includes pinout information, functional description, and configuration interface. This standard, along with other Referenced Specifications, should be treated as a whole for the purposes of defining overall functionality for CXL® Memory Controller (referred to as CMC). Committee(s): JC-40 Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, GULL WING, 0.95 MM PITCH, RECT PACKAGE (TRANSISTOR) |
TO-236-I | Sep 2024 |
Item #: 11-1067 Package Designator: PDSO-G3(6)-i0p95.... Committee(s): JC-11 Free download. Registration or login required. |
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JEDEC® Memory Device Management Standard – for Compute Express Link® (CXL®) |
JESD325 | Sep 2024 |
This standard provides a reference specification for systems and device management capabilities found in CXL memory devices. It is intended to target, but may not be limited to, CXL memory FRUs that are based on PCIe Gen 5 and compliant to the CXL 2.0 Specification or later. Free download. Registration or login required. |
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DDR5 SERIAL PRESENCE DETECT (SPD) CONTENTSRelease Number: Release 1.3 |
JESD400-5C | Sep 2024 |
This standard describes the serial presence detect (SPD) values for all DDR5 memory modules. In this context, “modules” applies to memory modules like traditional Dual In-line Memory Modules (DIMMs) or solder-down motherboard applications. The SPD data provides critical information about all modules on the memory channel and is intended to be use by the system's BIOS in order to properly initialize and optimize the system memory channels. Committee(s): JC-45 Free download. Registration or login required. |
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Temperature Range and Measurement Standards for Components and Modules |
JESD402-1B | Sep 2024 |
This document specifies standard temperature ranges that may be used, by way of referencing JESD402-1, in other standards, specifications, and datasheets when defining temperature related specifications. Committee(s): JC-42 Free download. Registration or login required. |
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PLASTIC DUAL FLANGE MOUNT, 2.00 MM PITCH RECT PACKAGE (TRANSISTOR) |
TO-283A | Sep 2024 |
Item #11-1060 Package Designator: PDFM-E5_I2p0.... Free download. Registration or login required. |
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Foundry Process Qualification Guidelines – Technology Qualification Vehicle Testing (Wafer Fabrication Manufacturing Sites) |
JEP001-3B | Sep 2024 |
The publication provides methodologies for measurements to qualify a new semiconductor wafer process. Free download. Registration or login required. |
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PLASTIC MULTI SMALL OUTLINE, 1.20 MM PITCH PACKAGE 1.14 MM PITCH, 15.40 MM BODY WIDTH, RECT FAMILY PACKAGE |
MO-354B | Sep 2024 |
Item: 11-1065 Designator: PMSO-E#_I1p14-... Free download. Registration or login required. |
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PLASTIC BOTTOM GRID ARRAY BALL, 0.80 MM PITCH, SQUARE FAMILY PACKAGE |
MO-216H | Sep 2024 |
Designator: PBGA-B#[#]_I80... Item: 11-1064
Cross Reference: DR4.5 Free download. Registration or login required. |
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PART MODEL SCHEMAS |
JEP30-10v6-0-0 | Aug 2024 |
This download includes all files under the parent schema JEP30-10v6-0-0 (Committees: JC-11, JC-11.2) including:
This will enable the user to validate the schemas. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-14, JC-15, JC-16 Free download. Registration or login required. |
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Part Model Electrical Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-E100E | Aug 2024 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, Electrical, assembly process classification data along with materials and substances that may be present in the supplied product or subproducts. This Guideline specifically focuses on the “Electrical” sub-section of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-16 Free download. Registration or login required. |
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Part Model Assembly Process Classification Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-A100B | Aug 2024 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or subproducts. This Guideline specifically focuses on the “Assembly Process Classification” subsection of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-14.4 Free download. Registration or login required. |
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Part Model Guidelines for Electronic-Device Packages – XML Requirements |
JEP30E | Aug 2024 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It covers several sub-sections such as electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the parental structure, under which several sub-section listed above, can be contained and linked together within the Part Model parent structure. For more information visit the main JEP30 webpage. Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, RECTANGULAR FAMILY PACKAGE |
MO-153I | Aug 2024 |
Package Designator: PDSO-G#-I##.... Item# - JC11.11-1069 Free download. Registration or login required. |
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SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD |
JESD218B.03 | Aug 2024 |
Terminology Update, see Annex. This standard defines JEDEC requirements for solid state drives. For each defined class of solid state drive, the standard defines the conditions of use and the corresponding endurance verification requirements. Although endurance is to be rated based upon the standard conditions of use for the class, the standard also sets out requirements for possible additional use conditions as agreed to between manufacturer and purchaser. Revision A includes further information on SSD Capacity. Items 303.19, 303.20, 303.21, 303.22, 303.23, 303.26, 303.27, 303.28, and 303.32 Committee(s): JC-64.8 Available for purchase: $76.00 Add to Cart Paying JEDEC Members may login for free access. |
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Guidelines for Reverse Recovery Time and Charge Measurement of SiC MOSFET Version 1.0 |
JEP201 | Aug 2024 |
This guideline is intended to overcome the limitations of prior standards and provide a test circuit and method that provides both reliable and repeatable results. Free download. Registration or login required. |
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PLASTIC DUAL FLATPACK, SURFACE TERMINAL, 1.27 MM PITCH RECTANGULAR FAMILY PACKAGE |
MO-364A | Aug 2024 |
Designator:PDFN-N[#]_I1p27... Item #: 11-1063
Free download. Registration or login required. |
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JEDEC Module Sideband Bus (SidebandBus) |
JESD403-1C.01 | Aug 2024 |
This standard defines the assumptions for the system management bus for next generation memory solutions; covering the interface protocol, use of hub devices, and voltages appropriate to these usages. Committee(s): JC-45 Free download. Registration or login required. |
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Part Model Supply Chain Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-S100A | Aug 2024 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, supply chain, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the SupplyChain sub-section of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-14.4 Free download. Registration or login required. |
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Part Model Thermal Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-T100B | Aug 2024 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the "Thermal" subsection of the Part Model. For more information visit the main JEP30 webpage. Committee(s): JC-11, JC-11.2, JC-15 Free download. Registration or login required. |
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Part Model Package Guidelines for Electronic-Device Packages – XML Requirements |
JEP30-P100E | Aug 2024 |
This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, thermal, assembly process classification data along with materials and substances that may be present in the supplied product or sub-products. This Guideline specifically focuses on the "Package" subsection of the Part Model. For more information visit the main JEP30 webpage. Free download. Registration or login required. |
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LPDDR5 CAMM2 Connector Performance Standard |
PS-007A | Jul 2024 |
LPDDR5 CAMM2 Connector Performance Standard Free download. Registration or login required. |
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PLASTIC BOTTOM GRID, ARRAY BALL, 0.60 MM X 0.50 MM PITCH RECTANGULAR FAMILY PACKAGE |
MO-363A | Jul 2024 |
Designator: PBGA-B#[#]_I0p5... Item #: 11-1066 Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, GULL WING, 2.00 MM PITCH, RECTANGULAR PACKAGE |
MO-359B | Jul 2024 |
Designator: H-PDSO-G12_12p0-12p0x9p4Z2p8 Item No: 11-1049
Free download. Registration or login required. |
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Descriptive Designation System for Electronic-device Packages and Footprints |
JESD30M | Jul 2024 |
This standard establishes requirements for the generation of electronic-device package designators. Free download. Registration or login required. |
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Style Manual for Standards and Other Publications of JEDEC |
JM7A | Jul 2024 |
This manual establishes requirements for the preparation of standards and certain other publications of the JEDEC Solid State Technology Association. Committee(s): JC-10 Free download. Registration or login required. |
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DDR5 SDRAMRelease Number: Version 1.31 |
JESD79-5C.01 | Jul 2024 |
Version 1.31 This standard defines the DDR5 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 8 Gb through 32 Gb for x4, x8, and x16 DDR5 SDRAM devices. This standard was created based on the DDR4 standards (JESD79-4) and some aspects of the DDR, DDR2, DDR3, and LPDDR4 standards (JESD79, JESD79-2, JESD79-3, and JESD209-4). Available for purchase: $423.00 Add to Cart Paying JEDEC Members may login for free access. |
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PLASTIC FLANGE MOUNT, THROUGH-HOLE, 2.54 MM PITCH RECT PACKAGE (TRANSISTOR) |
TO-282A | Jun 2024 |
Package Designator: PMDF-T5_I2p54... Item # 11-1058 Patents(): Owners: - Otremba, Ralf - Kasztelan, Christian - Fuergut, Edward - Lee, Teck Sim - Wang, Lee Shuang - Kuek, Hsieh Ting - Murugan, Sanjay Kumar Company: - Infineon Technologies AG, 85579 Neubiberg, DE Patent Number (Germany): - DE 102015109073 B4 Title: - Free download. Registration or login required. |
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MCP and Discrete e•MMC, e•2MMC, and UFSRelease Number: 33 |
MCP3.12.1-1 | Jun 2024 |
Item 142.12 This section provides electrical interface items related to Multi-Chip Packages (MCP) and Stacked-Chip Scale Packages (SCSP) of mixed memory technologies including Flash (NOR and NAND), SRAM, PSRAM, LPDRAM, USF, etc. These items include die-on-die stacking within a single encapsulated package, package-on-package or module-in-package technologies, etc. The Section also contains Silicon Pad Sequence information for the various memory technologies to aid in the design and electrical optimization of the memory sub-system or complete memory stacked solution.
Committee(s): JC-64.2 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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LPDDR5/5X Serial Presence Detect (SPD) ContentsRelease Number: 1.0 |
JESD406-5 | Jun 2024 |
This publication describes the serial presence detect (SPD) values for all LPDDR5/5X memory modules. In this context, “modules” applies to memory modules like traditional Dual In-line Memory Modules (DIMMs) or solder-down motherboard applications. The SPD data provides critical information about all modules on the memory channel and is intended to be use by the system's BIOS in order to properly initialize and optimize the system memory channels. The storage capacity of the SPD non-volatile memory is limited, so a number of techniques are employed to optimize the use of these bytes, including overlays and run length limited coding. Committee(s): JC-45 Free download. Registration or login required. |
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PLASTIC DUAL UPPER TO BOTTOM, 1.38 MM X1.00 MM PITCH CONNECTOR (CMT) |
SO-032C | Jun 2024 |
Designator: SO-032B_PDUtBXC-H644_I1p0-R17p15x78p0Z1p05 Patents(): Patent NO: 9,425,525 Free download. Registration or login required. |
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Test Methods for Switching Energy Loss Associated with Output Capacitance Hysteresis in Semiconductor Power Devices Volume 1 |
JEP200 | Jun 2024 |
This document provides guidelines for test methods and circuits to be used for measuring switching energy loss due to output capacitance hysteresis in semiconductor power devices. Committee(s): JC-70, JC-70.1, JC-70.2 Free download. Registration or login required. |
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DDR5 CAMM2, 1.00 MM X 1.38 MM PITCH, MICROELECTRONIC ASSEMBLY |
MO-358B | Jun 2024 |
Designator: XBNA-N#_I1p0_... Item No: 14-229 Free download. Registration or login required. |
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LPDDR5 CAMM2, 1.38 MM X 1.00 MM PITCH MICROELECTRONIC ASSEMBLY |
MO-357C | Jun 2024 |
Designator: XBMA-H644_I1p0_R78p0x23p0Z2p6 Item #: 14-228 Free download. Registration or login required. |
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JEDEC® Memory Module Label – for Compute Express Link® (CXL®)Release Number: 1.1 |
JESD405-1B | Jun 2024 |
This standard defines the labels that shall be applied to all CXL memory modules to fully describe the key attributes of the module. The label can be in the form of a stick-on label, silk screened onto the assembly, or marked using an alternate customer-readable format. Committee(s): JC-45 Free download. Registration or login required. |
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288 TERM DDR5 DIMM, 0.85 MM PITCH, MICROELECTRONIC ASSEMBLY |
MO-329H.01 | Jun 2024 |
Designator: PDMA-N288-I0p85-R133p8x#p#7Z31p8R2p55x0p6 Item: 11.14-224, Access Cross Reference: MO-329, SO-023, GS-010
Patents(): Micron: US7,547,213. Free download. Registration or login required. |
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Guidelines for Visual Inspection and Control of Flip Chip Type Packages (FCxGA) |
JEP170A | Jun 2024 |
This document provides guidelines for visual inspection and control that ensures quality and reliability of flip chip packaged devices. Free download. Registration or login required. |
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Information Requirements for the Qualification of Solid State Devices |
JESD69D | Jun 2024 |
This standard defines the requirements for the device qualification package, which the supplier provides to the customer. Free download. Registration or login required. |
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Board Level Drop Test Method of Components for Handheld Electronic Products |
JESD22-B111A.01 | Jun 2024 |
This Test Method standardizes the test board and test methodology to provide a reproducible assessment of the drop test performance of surface mounted components. Free download. Registration or login required. |
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DDR5 Registering Clock Driver Definition (DDR5RCD04) |
JESD82-514.01 | Jun 2024 |
This document defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the DDR5 Registering Clock Driver (RCD) with parity for driving address and control nets on DDR5 RDIMM applications. The DDR5RCD04 Device ID is DID = 0x0054. Free download. Registration or login required. |
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Low Power Double Data Rate 4 (LPDDR4) |
JESD209-4E | Jun 2024 |
This document defines the LPDDR4 standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for a JEDEC compliant 16 bit per channel SDRAM device with either one or two channels. LPDDR4 dual channel device density ranges from 2 Gb through 32 Gb and single channel density ranges from 1 Gb through 16 Gb. Available for purchase: $374.00 Add to Cart Paying JEDEC Members may login for free access. |
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DDR5 DIMM Labels |
JESD401-5B.01 | May 2024 |
This standard defines the labels that shall be applied to all DDR5 memory modules to fully describe the key attributes of the module. The label can be in the form of a stick-on label, silk screened onto the assembly, or marked using an alternate customer-readable format. A readable point size should be used, and the number can be printed in one or more rows on the label. Hyphens may be dropped when lines are split, or when font changes sufficiently. Committee(s): JC-45 Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, GULL WING, RECTANGULAR PACKAGE |
MO-203D | May 2024 |
Item 11-1051 Package Designator: PDSO-G#_... Free download. Registration or login required. |
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PLASTIC BOTTOM GRID, ARRAY BALL, 0.50 MM X 0.70 MM PITCH RECTANGULAR FAMILY PACKAGE |
MO-360A | May 2024 |
Item #11-1048A Package Designator: PBGA-B#[#] I0p5... Free download. Registration or login required. |
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PLASTIC QUAD FLATPACK, 28 TERMINAL PACKAGE |
MO-339B | May 2024 |
Item 11-1054 Package Designator: PQFP-N28_I4p0... Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, GULL WING, 2 TERMINAL, RECTANGULAR PACKAGE (DIODE) |
DO-215E | May 2024 |
Package Designator: P-PDSO-G2... Committee(s): JC-11, JC-11.1, JC-11.10 Free download. Registration or login required. |
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SHIPPING AND HANDLING TRAY FOR LPDDR5 CAMM2 MODULE |
CO-041A | Apr 2024 |
Item #11.5-1057 Free download. Registration or login required. |
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Marking, Symbols, and Labels of Leaded and Lead-Free Terminal Finished Materials Used in Electronic Assembly |
J-STD-609C.01 | Apr 2024 |
This standard applies to components and assemblies that contain Pb-free and Pb-containing solders and finishes, and it describes the marking and labeling of their shipping containers to identify their 2nd level terminal finish or material. Free download. Registration or login required. |
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SHIPPING AND HANDLING TRAY FOR CAMM2 CONNECTOR |
CO-040B | Apr 2024 |
Designator: N/A Item #: 11.5-1041 Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, FLAT LEAD, 2 TERMINAL, RECTANGULAR PACKAGE (DIODE) |
DO-219D | Apr 2024 |
Free download. Registration or login required. |
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PMIC5020 Power Management IC StandardRelease Number: Version 1.0.1 |
JESD301-4 | Apr 2024 |
This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5020 refers to the device specified by this document. The purpose is to provide a standard for the PMIC5020 device for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. Free download. Registration or login required. |
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Procedure for Reliability Characterization of Metal-Insulator-Metal Capacitors |
JEP199 | Apr 2024 |
This document defines the standards for achieving Reliability certification and qualification of on-chip MIM Capacitors and MIS Trench Capacitors. Free download. Registration or login required. |
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PLASTIC BOTTOM GRID, ARRAY BALL, 0.60 MM X 0.0675 MM PITCH RECTANGULAR FAMILY PACKAGE |
MO-361A | Apr 2024 |
Designator: PBGA--B264[294]_I0p60-R8p7X14p4Z1p0-C0p3Z# Item: 11-1050 Free download. Registration or login required. |
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Gate Dielectric Breakdown |
JESD263 | Mar 2024 |
This document describes procedures developed for estimating the overall integrity of gate dielectrics. JESD263 supersedes these other 4 standards: JESD35A, JESD35-1 ADDENDUM, JESD35-2 and JESD92. Free download. Registration or login required. |