Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
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UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), Version 2.1Status: Supersededby JESD223D, January 2018 |
JESD223C | Mar 2016 |
This document has been superseded by JESD223D, January 2018, however is available for reference only. Committee(s): JC-64.1 Free download. Registration or login required. |
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SPD Annex F, Address Multiplexed ROM |
SPD4.1.2.6 | Jun 1998 |
Release No.8 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPD Annex C, Fast Page and Extended Data Out RAM |
SPD4.1.2.3 | Jan 1998 |
Release No.8 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Universal Flash Storage Host Controller Interface (UFSHCI), Version 4.0Status: Superseded December 2024 by JESD223F |
JESD223E | Aug 2022 |
NOTE: This document has been superseded by JESD223F published in December 2024, but remains available for reference purposes. Committee(s): JC-64.1 Available for purchase: $163.00 Add to Cart Paying JEDEC Members may login for free access. |
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DDR5 SERIAL PRESENCE DETECT (SPD) CONTENTSRelease Number: Release 1.3 |
JESD400-5C | Sep 2024 |
This standard describes the serial presence detect (SPD) values for all DDR5 memory modules. In this context, “modules” applies to memory modules like traditional Dual In-line Memory Modules (DIMMs) or solder-down motherboard applications. The SPD data provides critical information about all modules on the memory channel and is intended to be use by the system's BIOS in order to properly initialize and optimize the system memory channels. Committee(s): JC-45 Free download. Registration or login required. |