Standards & Documents Search

Displaying 6 - 10 of 24 documents. Show 5 | 10 | 20 results per page.

Title	Document #	Date
SPD Annex F, Address Multiplexed ROM	SPD4.1.2.6	Jun 1998
Release No.8 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SPD Annex C, Fast Page and Extended Data Out RAM	SPD4.1.2.3	Jan 1998
Release No.8 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Universal Flash Storage Host Controller Interface (UFSHCI), Version 4.0	JESD223E	Aug 2022
This standard describes a functional specification of the Host Controller Interface (HCI) for Universal Flash Storage (UFS). The objective of UFSHCI is to provide a uniform interface method of accessing the UFS hardware capabilities so that a standard/common Driver can be provided for the Host Controller. The common Driver would work with UFS host controller from any vendor. This standard includes a description of the hardware/software interface between system software and the host controller hardware. It is intended for hardware designers, system builders and software developers. This standard is a companion document to [UFS], Universal Flash Storage (UFS). The reader is assumed to be familiar with [UFS], [MIPI-UNIPRO], and [MIPI-M-PHY]. Item 206.25 Committee(s): JC-64.1 Available for purchase: $163.00 Add to Cart To help cover the costs of producing standards, JEDEC is now charging for non-member access to selected standards and design files. Most of the content on this site remains free to download with registration. Paying JEDEC member companies enjoy free access to all content. Learn more and apply today. Paying JEDEC Members may login for free access.
DDR5 SERIAL PRESENCE DETECT (SPD) CONTENTS Release Number: Release 1.3	JESD400-5C	Sep 2024
This standard describes the serial presence detect (SPD) values for all DDR5 memory modules. In this context, “modules” applies to memory modules like traditional Dual In-line Memory Modules (DIMMs) or solder-down motherboard applications. The SPD data provides critical information about all modules on the memory channel and is intended to be use by the system's BIOS in order to properly initialize and optimize the system memory channels. Committee(s): JC-45 Free download. Registration or login required.
UNIVERSAL FLASH STORAGE, Version 4.0	JESD220F	Aug 2022
This document replaces all past versions, however JESD220E, January 2020 (V 3.1), is available for reference only. This standard specifies the characteristics of the UFS electrical interface and the memory device. Such characteristics include (among others) low power consumption, high data throughput, low electromagnetic interference and optimization for mass memory subsystem efficiency. The UFS electrical interface is based on an advanced differential interface by MIPI M-PHY specification which together with the MIPI UniPro specification forms the interconnect of the UFS interface. Committee(s): JC-64.1 Available for purchase: $369.00 Add to Cart Paying JEDEC Members may login for free access.

Pages