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Title	Document #	Date
SILICON BOTTOM GRID ARRAY COLUMN, 0.035 MM X 0.055 MM PITCH RECTANGULAR PACKAGE	MO-362A	Nov 2024
Designator: SBGA-M16148[49588]_D0p068... Item #: 4-1056 Committee(s): JC-11 JEP95 Registrations Main Page Free download. Registration or login required.
Compression Attached Memory Module (CAMM2) Common Standard	JESD318A Ver. 1.10	Nov 2024
This standard defines the electrical and mechanical requirements for Double Data Rate, Synchronous DRAM Compression-Attached Memory Modules (DDR5 SDRAM CAMM2s) and Low Power Double Data Rate, Synchronous DRAM Compression-Attached Memory Modules (LP5 SDRAM CAMM2s). Committee(s): JC-45 Free download. Registration or login required.
LPDDR5/5X Compression Attached Memory Module (CAMM2) Raw Card E Annex Release Number: Version 1.00	JESD318-F0-RCE	Nov 2024
This standard, JESD318-F0-RCE, “LPDDR5/5X Compression Attached Memory Module (CAMM2) Raw Card E Annex”, defines the design detail of eight x16 subchannels from four 315-ball dual channel LPDDR5/5x devices. Committee(s): JC-45 Free download. Registration or login required.
DDR5 Clocked Small Outline Dual Inline Memory Module (CSODIMM) Raw Card A Annex Release Number: Version 1.00	JESD324-V0-RCA	Nov 2024
This standard, JESD324-V0-RCA, “DDR5 Clocked Small Outline Dual Inline Memory Module (CSODIMM) Raw Card A Annex” defines the design detail of x8, 1 Package Ranks DDR5 CSODIMM with Clock Driver. Committee(s): JC-45, JC-45.3 Free download. Registration or login required.
DDR5 Clocked Unbuffered Dual Inline Memory Module with 4-bit ECC Release Number: Version 1.00	JESD323-B4-RCD	Nov 2024
This standard, JESD323-B4-RCD, “DDR5 Clocked Unbuffered Dual Inline Memory Module with 4-bit ECC (EC4 CUDIMM) Raw Card D Annex” defines the design detail of x8, 1 Package Rank DDR5 ECC CUDIMM with Clock Driver. Committee(s): JC-45, JC-45.3 Free download. Registration or login required.

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