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Title	Document #	Date
Silicon Pad Sequence (x16/x32 LPDRAM, x16 PSRAM, x16 NAND). Item JC-63-029	MCP3.12.3	Nov 2006
Release No. 16A Committee(s): JC-63 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Package-on-Package (PoP) and Internal Stacked Module (ISM)	MCP3.12.2	Jan 2012
Release No. 22. Item 48.18, 48.24, 48.26, 38.21b, 48.06a, 38.26, 48.28, 48.29 Committee(s): JC-63 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
MCP and Discrete e•MMC, e•2MMC, and UFS Release Number: 33	MCP3.12.1-1	Jun 2024
Item 142.12 This section provides electrical interface items related to Multi-Chip Packages (MCP) and Stacked-Chip Scale Packages (SCSP) of mixed memory technologies including Flash (NOR and NAND), SRAM, PSRAM, LPDRAM, USF, etc. These items include die-on-die stacking within a single encapsulated package, package-on-package or module-in-package technologies, etc. The Section also contains Silicon Pad Sequence information for the various memory technologies to aid in the design and electrical optimization of the memory sub-system or complete memory stacked solution. Committee(s): JC-64.2 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Memory Module Nomenclature	SPD4.1.1	Jun 1997
Release No.9 Committee(s): JC-42, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SPD Annex A, Table of Memory Types	SPD4.1.2.1	Apr 2003
Release No.12 Committee(s): JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.

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