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Release No. 14

Committee(s): JC-42, JC-45

JESD21-C Solid State Memory Documents Main Page

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Release No. 21
 Item 2082.29B, 2082.70, 2082.80, 2082.91

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Release No. 21
Item 2082.56B, 2082.72, 2082.81, 2082.92

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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This standard establishes the requirements for exchanging part data between part manufacturers and their customers for electrical and electronic products. This standard applies to all forms of electronic parts. It forms part of the Part Model XML Schema, which covers the parental structure for the electrical, physical, Electrical, assembly process classification data along with materials and substances that may be present in the supplied product or subproducts. This Guideline specifically focuses on the “Electrical” sub-section of the Part Model.

For more information visit the main JEP30 webpage.

Committee(s): JC-11, JC-11.2, JC-16

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Release No. 23
Item 2114.29A

Committee(s): JC-45.3

JESD21-C Solid State Memory Documents Main Page

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Release No. 21

Item 2082.93

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Release No. 24. Item 2192.54

Committee(s): JC-45.4

JESD21-C Solid State Memory Documents Main Page

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Release 22. Item 2145.37

Committee(s): JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Release No. 22
Item 2082.98

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Item No. 2229.01 (JC-45.3-11-523, JCB-11-102)

Committee(s): JC-45.3

JESD21-C Solid State Memory Documents Main Page

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Release 31. Item 2029.04

This revision contains terminology updates only.

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Release No. 21
Item 2145.27

Committee(s): JC-45.1

JESD21-C Solid State Memory Documents Main Page

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This standard specifies the host and device interface for a DDR4 NVDIMM-N, which is a DIMM that achieves non-volatility by copying SDRAM contents into non-volatile memory (NVM) when host power is lost using an Energy Source managed by either the module or the host. This standard is used in conjunction with JESD248. Item 2233.54G

Committee(s): JC-45.6

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Release No. 21
Item 2182.01

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Release No. 21
Item 2182.02

Committee(s): JC-45, JC-45.1

JESD21-C Solid State Memory Documents Main Page

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Release No. 19

Committee(s): JC-45.1, JC-45

JESD21-C Solid State Memory Documents Main Page

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Terminology update.

This document defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the DDR4 Registering Clock Driver (RCD) with parity for driving address and control nets on DDR4 RDIMM and LRDIMM applications.

Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office.

Committee(s): JC-40.4

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This document defines the DDR4 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 2 Gb through 16 Gb for x4, x8, and x16 DDR4 SDRAM devices. This standard was created based on the DDR3 standard (JESD79-3) and some aspects of the DDR and DDR2 standards (JESD79, JESD79-2). Committee Item 1716.78H

Committee(s): JC-42.3C

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Terminology update. 
This standard includes four chapters of the FBD Channel Specification (cover) Channel Overview (Chapter 2), Initialization (Chapter 3), Channel Protocol (Chapter 4), and Reliability, Availability, and Serviceability (RAS) (Chapter 5).

Patents(): There are known patent issues that are common to all FBDIMM related specifications. See document for link to FBDIMM Patents.

Committee(s): JC-40

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