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Title	Document #	Date
ZENER AND VOLTAGE REGULATOR DIODE RATING VERIFICATION AND CHARACTERIZATION TESTING	JESD211.01	Nov 2012
This standard is applicable to diodes that are used as voltage regulators and voltage references. It describes terms and definitions and explains methods for verifying device ratings and measuring device characteristics. Committee(s): JC-22, JC-22.2 Free download. Registration or login required.
GUIDELINES FOR REPORTING AND USING ELECTRONIC PACKAGE THERMAL INFORMATION	JESD51-12.01	Nov 2012
This document provides guidelines for both reporting and using electronic package thermal information generated using JEDEC JESD51 standards. By addressing these two areas, this document can be used as the common basis for discussion between electronic package thermal information suppliers and users. Committee(s): JC-15, JC-15.1 Free download. Registration or login required.
TERMS, DEFINITIONS, AND LETTER SYMBOLS FOR MICROELECTRONIC DEVICES:	JESD99C	Dec 2012
This standard will be useful to users, manufacturers, educators, technical writers, and others interested in the characterization, nomenclature, and classification of microelectronics devices. There are general guidelines for both letter symbols and abbreviations applicable to all integrated circuits, and detailed sections for digital ICs, linear (analog) ICs, interface ICs (including D/A and A/D converters), voltage regulators, charge-transfer devices. The standard lists and defines more than 400 of the most common physical and electrical terms applicable to these devices and shows the industry-standard symbol and abbreviations that have been established for such terms. Committee(s): JC-10 Free download. Registration or login required.
240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification	MODULE4.20.23	Dec 2012
Release 22. Item 2082.94A Committee(s): JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
144-Pin EP3-3200/EP3-4200/EP3-5300/EP3-6400 Unbuffered 32b-SO-DIMM Design Specification	MODULE4.20.22.C	Dec 2012
Release 22. Item 2227.07A Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
144-Pin EP3-3200/EP3-4200/EP3-5300/EP3-6400 Unbuffered 32b-SO-DIMM Design Specification	MODULE4.20.22.A	Dec 2012
Release 22. Item 2227.03A Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
RF BIASED LIFE (RFBL) TEST Status: Reaffirmed October 2024	JESD226	Jan 2013
This stress method is used to determine the effects of RF bias conditions and temperature on Power Amplifier Modules (PAMs) over time. These conditions are intended to simulate the devices’ operating condition in an accelerated way, and they are expected to be applied primarily for device qualification and reliability monitoring. The purpose of this test is for use to determine the effects of nominal DC and RF bias conditions and high temperature on Power Amplifier Modules (PAMs) over time. It simulates the devices’ operating condition in an accelerated way, and is primarily intended for device qualification testing and reliability monitoring which stresses all of the modules’ thermal and electrical failure mechanisms anticipated in typical use. Committee(s): JC-14.7 Free download. Registration or login required.
R/C M, in 240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification	MODULE4.20.23.M	Jan 2013
Release No. 22 Item 2145.39 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
R/C AD, in 240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification	MODULE4.20.23.AD	Jan 2013
Release No. 22 Item 2082.98 Committee(s): JC-45, JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
JEDEC Test Document	JMTest	Feb 2013
Test: please disregard.
Registration - 4 Lead Flat and Gullwing Surface Mount Power Package. HB1-PDSO, HB1-PSOF	MO-312A	Feb 2013
Item No. 11-875 Committee(s): JC-11, JC-11.11 JEP95 Registrations Main Page Free download. Registration or login required.
Standard Practices and Procedures - Module Insertion Procedure for DIMM and miniDIMM Connectors	SPP-023B	Feb 2013
Item 11.11-781(S) Committee(s): JC-11, JC-11.2 JEP95 Registrations Main Page Free download. Registration or login required.
204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SO-DIMM Design Specification	MODULE4.20.21 Annex C	Mar 2013
Release 23. Item 2114.28 Committee(s): JC-45, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SALT ATMOSPHERE Status: Reaffirmed September 2020	JESD22-A107C	Apr 2013
Salt atmosphere is a destructive, accelerated stress that simulates the effects of severe seacoast atmosphere on all exposed surfaces. Such stressing and post-stress testing determine the resistance of solid-state devices to corrosion and may be performed on commercial and industrial product in molded or hermetic packages. Committee(s): JC-14, JC-14.1 Free download. Registration or login required.
Addendum No. 1 to JESD79-3 - 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, DDR3L-1600, and DDR3L-1866 This is a minor editorial revision, the differences between revisions can be found on page 17 of the document.	JESD79-3-1A.01	May 2013
The JESD79-3 document defines DDR3L SDRAM, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments with the exception of what is stated within this standard. The purpose of this standard is to define the DDR3L specifications that supersede the DDR3 specifications as defined in JESD79-3. The use of DDR3-800, DDR3-1066, DDR3-1333, DDR3-1600, and DDR3L-1866 titles in JESD79-3 are to be interpreted as DDR3L-800, DDR3L-1066, DDR3L-1333, DDR3L-1600, and DDR3L-1866 respectively, when applying towards DDR3L definition; unless specifically stated otherwise. Committee(s): JC-42, JC-42.3 Free download. Registration or login required.
Registration - Square and Rectangular Die-Size, Ball Grid Array Family. (L, T, V, W) F (R)- xDSB.	MO-207N	Jun 2013
Item 11.4-846 Committee(s): JC-11, JC-11.4 JEP95 Registrations Main Page Free download. Registration or login required.
LOW POWER DOUBLE DATA RATE 2 (LPDDR2)	JESD209-2F	Jun 2013
This document defines the LPDDR2 specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. This standard covers the following technologies: LPDDR2-S2A, LPDDR2-S2B, LPDDR2-S4A, LPDDR2-S4B, LPDDR2-N-A, and LPDDR2-N-B. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant 64 Mb through 8 Gb for x8, x16, and x32 SDRAM devices as well as 64 Mb through 32 Gb for x8, x16, and x32 for NVM devices. Item 1725.01G. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s): JC-42.6 Free download. Registration or login required.
Registration - Ball Grid Array Family, Rectangular, 1.0 mm pitch. (V, T, L) R-PBGA	MO-304D	Jul 2013
Item 11.11-882 Committee(s): JC-11, JC-11.11 JEP95 Registrations Main Page Free download. Registration or login required.
144-Pin EP3-3200/EP3-4200/EP3-5300/EP3-6400 Unbuffered 32b-SO-DIMM Design Specification	MODULE4.20.22.D	Aug 2013
Release 22. Item 2227.09A Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SODIMM Design Specification	MODULE4.20.21.D	Aug 2013
Release No. 23 Item 2114.29A Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
144-Pin EP3-3200/EP3-4200/EP3-5300/EP3-6400 Unbuffered 32b-SO-DIMM Design Specification	MODULE4.20.22.B	Aug 2013
Release 23. Item 2227.13 Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Registration - Plastic Surface Mounted Header Family. H-PSIP-G.	TO-263F	Sep 2013
Item No. 10-452 Committee(s): JC-11, JC-11.10 JEP95 Registrations Main Page Free download. Registration or login required.
Registration - Wide I/O Micropillar Grid Array Package (MPGA) (X2,X3,X4)F(R)-SCDS	MO-305C	Oct 2013
Item No. 11.4-881 Patents(): Qualcomm: US2010/0300743; UTAC: US7824960, US7883938, US7948095B2, US2008/0303031, US2008/0303163, US2010/0209142, US2010/0109169, US2010/0261313 Committee(s): JC-11, JC-11.4, JC-11.11 JEP95 Registrations Main Page Free download. Registration or login required.
QUALITY SYSTEM ASSESSMENT (SUPERSEDES EIA670):	JESD670A	Oct 2013
This standard provides a checklist that is intended as a tool to allow users to assess the level of compliance of a quality management system to the requirements ISO 9001:2008. The questions in this checklist are of a generic nature and intended to be applicable to all organizations, not just those involved in the electronics industry. It can be useful while performing self-assessments of the organization or other internal audit procedures. It is not intended for use by a contracted third party registrar during a formal audit to the requirements of ISO 9001:2008. Committee(s): JC-14.4
GUIDE TO STANDARDS AND PUBLICATIONS RELATING TO QUALITY AND RELIABILITY OF ELECTRONIC HARDWARE	JEP70C	Oct 2013
This document gathers and organizes common standards and publications relating to quality processes and methods relating to the solid-state, microelectronics, and associated industries. This is intended to facilitate access to the applicable documents when working with electronic hardware. This will have a positive effect on quality and reliability as users gain more access to proper methods in designing, producing, and testing parts. Committee(s): JC-14.4 Free download. Registration or login required.
TEST STANDARD FOR THE MEASUREMENT OF PROTON RADIATION SINGLE EVENT EFFECTS IN ELECTRONIC DEVICES	JESD234	Oct 2013
This test standard defines the requirements and procedures for 40 to 500 MeV proton irradiation of electronic devices for Single Event Effects (SEE), and reporting the results. Protons are capable of causing SEE by both direct and indirect ionization, however, in this energy range, indirect ionization will be the dominant cause of SEE [1-3]. Indirect ionization is produced from secondary particles of proton/material nuclear reactions, where the material is Si or any other element present in the semiconductor. Direct proton ionization is thought to be a minor source of SEE, at these energies. This energy range is also selected to coincide with the commonly used proton facilities, and result in the fewest energy dependent issues during test. Committee(s): JC-13, JC-13.4 Free download. Registration or login required.
PRELIMINARY RELEASE FOR JESD21: DDR3 MINI-UDIMM RC F0(x8 2R, STACKED)	PRN13-NM1	Oct 2013
Item No. 2229.01 (JC-45.3-11-523, JCB-11-102) Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
PRELIMINARY RELEASE FOR JESD21: DDR3 MINI-RDIMM ANNEX D (x8 2R, Planar)	PRN13-NM3	Oct 2013
Item No. 2207.14 (JC-45.1-12-284, JCB-12-63) Committee(s): JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
FIELD-INDUCED CHARGED-DEVICE MODEL TEST METHOD FOR ELECTROSTATIC DISCHARGE WITHSTAND THRESHOLDS OF MICROELECTRONIC COMPONENTS Status: Rescinded February 2020	JESD22-C101F	Oct 2013
The material in this test method has been superseded by JS-002-2018, published January 2019, which in turn has been superseded by JS-002-2022, published January 2023. Committee(s): JC-14, JC-14.1
Registration - Lead Mounted Family, Axial Type, Chamfer (Round) Body Diode. PALF (Ref. DO-27, DO-32, DO-39)	DO-201B	Nov 2013
Item 11.10-453 Committee(s): JC-11, JC-11.10 JEP95 Registrations Main Page Free download. Registration or login required.
SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 1 Release Number: 23	SPD4.1.2.L-1	Nov 2013
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 1. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01 Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Addendum No. 3 to JESD79-3, 3D STACKED SDRAM	JESD79-3-3	Dec 2013
This addendum to JESD79-3 defines the 3DS DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for compliant 8Gbit through 64Gbit x4 and x8 3DS DDR3 SDRAM devices. This document was created based on the E revision of the DDR standard (JESD79). Each aspect of the changes for 3DS DDR3 SDRAM operation was considered. Committee(s): JC-42.3 Free download. Registration or login required.
Design Requirements - Die-Size Ball Grid Array Packages (DSBGA) Design Guide.	DG-4.7F	Jan 2014
Item 11.2-829R Committee(s): JC-11.2 JEP95 Registrations Main Page Free download. Registration or login required.
RELIABILITY QUALIFICATION OF SEMICONDUCTOR DEVICES BASED ON PHYSICS OF FAILURE RISK AND OPPORTUNITY ASSESSMENT Status: Reaffirmed September 2019	JEP148B	Jan 2014
A concept is outlined, which proactively integrates qualification into the development process and provides a systematic procedure as support tool to development and gives early focus on required activities. It converts requirements for a product into measures of development and qualification in combination with a risk and opportunity assessment step and accompanies the development process as guiding and recording tool for advanced quality planning and confirmation. The collected data enlarge the knowledge database for DFR / BIR (design for reliability / building-in reliability) to be used for future projects. The procedure challenges and promotes teamwork of all involved disciplines. Committee(s): JC-14, JC-14.3 Free download. Registration or login required.
SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 2 Release Number: 23A	SPD4.1.2.L-2	Jan 2014
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 2. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. (This release is editorial changes only). Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Registration - DDR3 Single Sided SODIMM 204 Pin Socket Outline with 0.60 mm Pitch. SKT	SO-020A	Jan 2014
Item No. 11.14-153 Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
Registration - 260 Pin DDR4 SODIMM, 0.50 mm Pitch. DIMM	MO-310C	Feb 2014
Item No. 11.14-164 Committee(s): JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
DDR4 UDIMM Design Specification Annex D	PRN14-NM1	Feb 2014
Item 2231.09 Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
SPD Annex K - Serial Presence Detect (SPD) for DDR3 SDRAM Modules, Release 6	SPD4.1.2.11	Feb 2014
Release No. 24. Item 2065.47A Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Registration - 204 Pin DDR3 SODIMM w/ 0.60 mm Pitch. DIM	MO-268E	Mar 2014
Item 11.14-151 Patents(): Hatachi: 5,227,664 Committee(s): JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.

Standards & Documents Search

ZENER AND VOLTAGE REGULATOR DIODE RATING VERIFICATION AND CHARACTERIZATION TESTING

GUIDELINES FOR REPORTING AND USING ELECTRONIC PACKAGE THERMAL INFORMATION

TERMS, DEFINITIONS, AND LETTER SYMBOLS FOR MICROELECTRONIC DEVICES:

240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification

144-Pin EP3-3200/EP3-4200/EP3-5300/EP3-6400 Unbuffered 32b-SO-DIMM Design Specification

144-Pin EP3-3200/EP3-4200/EP3-5300/EP3-6400 Unbuffered 32b-SO-DIMM Design Specification

RF BIASED LIFE (RFBL) TEST

R/C M, in 240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification

R/C AD, in 240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification

JEDEC Test Document

Registration - 4 Lead Flat and Gullwing Surface Mount Power Package. HB1-PDSO, HB1-PSOF

Standard Practices and Procedures - Module Insertion Procedure for DIMM and miniDIMM Connectors

204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SO-DIMM Design Specification

SALT ATMOSPHERE

Addendum No. 1 to JESD79-3 - 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, DDR3L-1600, and DDR3L-1866

Registration - Square and Rectangular Die-Size, Ball Grid Array Family. (L, T, V, W) F (R)- xDSB.

LOW POWER DOUBLE DATA RATE 2 (LPDDR2)

Registration - Ball Grid Array Family, Rectangular, 1.0 mm pitch. (V, T, L) R-PBGA

144-Pin EP3-3200/EP3-4200/EP3-5300/EP3-6400 Unbuffered 32b-SO-DIMM Design Specification

204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SODIMM Design Specification

144-Pin EP3-3200/EP3-4200/EP3-5300/EP3-6400 Unbuffered 32b-SO-DIMM Design Specification

Registration - Plastic Surface Mounted Header Family. H-PSIP-G.

Registration - Wide I/O Micropillar Grid Array Package (MPGA) (X2,X3,X4)F(R)-SCDS

QUALITY SYSTEM ASSESSMENT (SUPERSEDES EIA670):

GUIDE TO STANDARDS AND PUBLICATIONS RELATING TO QUALITY AND RELIABILITY OF ELECTRONIC HARDWARE

TEST STANDARD FOR THE MEASUREMENT OF PROTON RADIATION SINGLE EVENT EFFECTS IN ELECTRONIC DEVICES

PRELIMINARY RELEASE FOR JESD21: DDR3 MINI-UDIMM RC F0(x8 2R, STACKED)

PRELIMINARY RELEASE FOR JESD21: DDR3 MINI-RDIMM ANNEX D (x8 2R, Planar)

FIELD-INDUCED CHARGED-DEVICE MODEL TEST METHOD FOR ELECTROSTATIC DISCHARGE WITHSTAND THRESHOLDS OF MICROELECTRONIC COMPONENTS

Registration - Lead Mounted Family, Axial Type, Chamfer (Round) Body Diode. PALF (Ref. DO-27, DO-32, DO-39)

SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 1

Addendum No. 3 to JESD79-3, 3D STACKED SDRAM

Design Requirements - Die-Size Ball Grid Array Packages (DSBGA) Design Guide.

RELIABILITY QUALIFICATION OF SEMICONDUCTOR DEVICES BASED ON PHYSICS OF FAILURE RISK AND OPPORTUNITY ASSESSMENT

SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 2

Registration - DDR3 Single Sided SODIMM 204 Pin Socket Outline with 0.60 mm Pitch. SKT

Registration - 260 Pin DDR4 SODIMM, 0.50 mm Pitch. DIMM

DDR4 UDIMM Design Specification Annex D

SPD Annex K - Serial Presence Detect (SPD) for DDR3 SDRAM Modules, Release 6

Registration - 204 Pin DDR3 SODIMM w/ 0.60 mm Pitch. DIM

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