Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
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200 Pin, PC-2700/PC-2100/PC-1600 Unbuffered SO-DIMM SDRAM Reference Design Specification |
MODULE4.20.6 | Oct 2003 |
Release No. 13 Committee(s): JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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200-Pin DDR2 SDRAM Unbuffered SODIMM Design Specification |
MODULE4.20.11 | Jun 2008 |
Release No. 18. Item 2168.01 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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204-Pin DDR3 SDRAM Unbuffered SODIMM Design Specification |
MODULE4.20.18 | May 2014 |
Release No. 24; Item 2114.44 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-S0-DIMM Design Specification |
MODULE4.20.21 | Aug 2012 |
Release 22. Item 2189.17 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SO-DIMM Design Specification |
MODULE4.20.21.B | May 2011 |
Release No. 21 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SO-DIMM Design Specification |
MODULE4.20.21 Annex C | Mar 2013 |
Release 23. Item 2114.28 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SODIMM Design Specification |
MODULE4.20.21.D | Aug 2013 |
Release No. 23 Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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204-Pin EP3-6400/EP3-8500/EP3-10600/EP3-12800 DDR3 SDRAM 72b-SODIMM Design Specification |
MODULE4.20.21.A | May 2011 |
Release No. 21 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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214-Pin DDR2 SDRAM Unbuffered MicroDIMM Design Specification |
MODULE4.20.12 | Apr 2004 |
Release No. 14 Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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240-Pin PC2-5300/PC2-6400 DDR2 SDRAM Unbuffered DIMM Design Specification |
MODULE4.20.13 | May 2021 |
Release 31. Item 2167.05 This revision contains terminology updates only. Committee(s): JC-45, JC-45.2, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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240-Pin PC2-6400/PC2-5300/PC2-4200/PC2-3200 DDR2 SDRAM Registered DIMM Design Standard, Rev 4.04. |
MODULE4.20.10 | Jan 2010 |
Release No. 19A. Items 2133.37, 2191.00, 2191.02, 2129.12, 2113.33. JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification |
MODULE4.20.20 | Feb 2012 |
Release No. 22. Item 2082.94A JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Unbuffered DIMM Design Specification |
MODULE4.20.19 | May 2021 |
Release No. 31. Item 2131.03, 2078.04, 2131.06 This revision contains terminology updates only. Committee(s): JC-45, JC-45.2, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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240-Pin Unbuffered and Registered DDR2 SDRAM DIMM Family |
MODULE4.5.14 | May 2021 |
Release No. 31 This revision contains terminology updates only. JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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240-Pin, 72 bit-wide, PC3(L)-6400/PC3(L)-8500/PC3(L)-10600/PC3(L)-12800/PC3(L)-14900/PC3(L)-17000 DDR3 SDRAM Load Reduced DIMM Design Specification |
MODULE4.20.24 | Apr 2014 |
Release No. 24. Item 2192.48A Committee(s): JC-45.4 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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240-Pin, 72 bit-wide, PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Registered DIMM Design Specification |
MODULE4.20.23 | Dec 2012 |
Release 22. Item 2082.94A Committee(s): JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design SpecificationRelease Number: 29 |
MODULE4.20.25 | Aug 2019 |
This document defines the electrical and mechanical requirements for 260 pin, 1.2 V (VDD), Small Outline, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM SODIMMs). These DDR4 SODIMMs are intended for use as main memory when installed in PCs, laptops and other systems. This document also contains the DDR4 DIMM Label, Ranks Definition. Item 2224.13A Committee(s): JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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278 Pin Buffered SDRAM DIMM |
MODULE4.6.1 | Jun 1997 |
Release No.9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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288 TERM DDR5 DIMM, 0.85 MM PITCH, MICROELECTRONIC ASSEMBLY |
MO-329I | Nov 2024 |
Designator: PDMA-N288-I0p85-R136p8x5p57Z31p8R2p55x0p6 Item: 14-230 Cross Reference: MO-329, SO-023, GS-010
Patents(): Micron: US7,547,213. Free download. Registration or login required. |
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288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/ PC4-3200 DDR4 SDRAM Non-Volatile NAND-Flash DIMM Design SpecificationStatus: RescindedThis document is published as JESD248Release Number: 26 |
MODULE4.20.29 | Oct 2016 |
See JESD248 Committee(s): JC-45.6 |
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288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Load Reduced DIMM Design SpecificationRelease Number: 25 |
MODULE4.20.27 | Aug 2015 |
Item 2204.07 This specification defines the electrical and mechanical requirements for 288-pin, 1.2 Volt (VDD), Load Reduced, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM LRDIMMs). These DDR4 Load Reduced DIMMs (LRDIMMs) are intended for use as main memory when installed in PCs. Committee(s): JC-45.4 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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288-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM Registered DIMM Design SpecificationRelease Number: 29 |
MODULE4.20.28 | May 2019 |
This specification defines the electrical and mechanical requirements for 288-pin, 1.2 Volt (VDD), Registered, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM RDIMMs). These DDR4 Registered DIMMs (RDIMMs) are intended for use as main memory when installed in PCs. Item 2149.05E Committee(s): JC-45.1 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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300 mV INTERFACE |
JESD8-28 | Jun 2015 |
This standard is to define and interface with a CMOS rail to rail signal that uses a 300 mV signal swing. This specification defines the maximum signaling rate, the signal Committee(s): JC-16 Free download. Registration or login required. |
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3D CHIP STACK WITH THROUGH-SILICON VIAS (TSVS): Identifying, Evaluating and Understanding Reliability Interactions |
JEP158 | Nov 2009 |
To increase device bandwidth, reduce power and shrink form factor, microelectronics manufacturers are implementing three dimensional (3D) chip stacking using through silicon vias (TSVs). Chip stacking with TSVs combines silicon and packaging technologies. As a result, these new structures have unique reliability requirements. This document is a guideline that describes how to evaluate the reliability of 3D TSV silicon assemblies. Free download. Registration or login required. |
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4.5 Table of Contents - Eight Byte Modules |
MODULE4.5 | Apr 2003 |
Release No.12 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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4.6 Table of Contents - Sixteen Byte Modules |
MODULE4.6 | Jun 1997 |
Release No.9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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48 Lead, Very, Very Thin Small Outline Package, Type 1. WR-PDSO1, WSOP1. Item 11.11-701. |
MO-259-A | Mar 2005 |
Free download. Registration or login required. |
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64 & 72 Pin ZIP/SIMM SRAM Module |
MODULE4.4.1 | Jun 1997 |
Release No.9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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72 Pin DRAM SIMM |
MODULE4.4.2 | Dec 1997 |
Release No.8 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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72 Pin DRAM SO-DIMM |
MODULE4.4.4 | Jun 1997 |
Release No. 9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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80 Pin EEPROM SIMM |
MODULE4.4.7 | Dec 1997 |
Release No.8 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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88 Pin DRAM CardStatus: Reaffirmed |
MODULE4.4.3 | Jun 1997 |
Release No.9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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88 Pin DRAM SO-DIMM |
MODULE4.4.5 | Jun 1997 |
Release No.9 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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A Case for Lowering Component-level CDM ESD Specifications and Requirements Part II: Die-to-Die Interfaces |
JEP196 | Nov 2023 |
This white paper presents an industry-wide survey on the relevance of industry-aligned D2D CDM targets and the currently used targets for D2D interfaces. Free download. Registration or login required. |
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A PROCEDURE FOR EXECUTING SWEAT:Status: Reaffirmed October 2012, September 2018 |
JEP119A | Aug 2003 |
This document describes an algorithm for performing the Standard Wafer Level Electromigration Accelerated Test (SWEAT) method with computer controlled instrumentation. The algorithm requires a separate iterative technique (not provided) to calculate the force current for a given target time to failure. This document does not specify what test structure to use with this procedure. However, users of this algorithm report its effectiveness on both straight-lines and via-terminated test structures. Some test-structures design features are provided in JESD87 and in ASTM 1259M - 96. Committee(s): JC-14.2 Free download. Registration or login required. |
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A PROCEDURE FOR MEASURING N-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION UNDER DC STRESS: |
JESD28-A | Dec 2001 |
This document describes an accelerated test for measuring the hot-carrier-induced degradation of a single n-channel MOSFET using dc bias. The purpose of this document is to specify a minimum set of measurements so that valid comparisons can be made between different technologies, IC processes, and process variations in a simple, consistent and controlled way. The measurements specified should be viewed as a starting point in the characterization and benchmarking of the transistor manufacturing process. Committee(s): JC-14.2 Free download. Registration or login required. |
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A PROCEDURE FOR MEASURING P-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION AT MAXIMUM GATE CURRENT UNDER DC STRESS: |
JESD60A | Sep 2004 |
This method establishes a standard procedure for accelerated testing of the hot-carrier-induced change of a p-channel MOSFET. The objective is to provide a minimum set of measurements so that accurate comparisons can be made between different technologies. The measurements specified should be viewed as a starting pint in the characterization and benchmarking of the trasistor manufacturing process. Committee(s): JC-14.2 Free download. Registration or login required. |
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A PROCEDURE FOR MEASURING P-CHANNEL MOSFET NEGATIVE BIAS TEMPERATURE INSTABILITIESStatus: Rescinded September 2021 (JC-14.2-21-183) |
JESD90 | Nov 2004 |
This document hasbeen replaced by JESD241, September 2021. |
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ACCELERATED MOISTURE RESISTANCE - UNBIASED AUTOCLAVEStatus: Reaffirmed January 2021 |
JESD22-A102E | Jul 2015 |
This test allows the user to evaluate the moisture resistance of nonhermetic packaged solid state devices. The Unbiased Autoclave Test is performed to evaluate the moisture resistance integrity of non-hermetic packaged solid state devices using moisture condensing or moisture saturated steam environments. It is a highly accelerated test that employs conditions of pressure, humidity and temperature under condensing conditions to accelerate moisture penetration through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors passing through it. This test is used to identify failure mechanisms internal to the package and is destructive. Committee(s): JC-14.1 Free download. Registration or login required. |
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ACCELERATED MOISTURE RESISTANCE - UNBIASED HAST |
JESD22-A118B.01 | May 2021 |
The Unbiased HAST is performed for the purpose of evaluating the reliability of nonhermetic packaged solid-state devices in humid environments. It is a highly accelerated test which employs temperature and humidity under noncondensing conditions to accelerate the penetration of moisture through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors that pass through it. Bias is not applied in this test to ensure the failure mechanisms potentially overshadowed by bias can be uncovered (e.g., galvanic corrosion). This test is used to identify failure mechanisms internal to the package and is destructive. Committee(s): JC-14.1 Free download. Registration or login required. |