Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
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Zoned Storage for UFS |
JESD220-5 | Nov 2023 |
The purpose of this standard is to describe Zoned Storage for UFS, which enables higher bandwidth, lower latency and to reduce write amplification. Patents(): Huawei 201911209032.1; 116166570,A Memory Technologies LLC 101952808 104657284 2248023 3493067 602009056490.0 602009064847.0 HK1210296 5663720 6602823 10-1281326 10-1468824 2248023 3493067 2248023 3493067 8307180 8601228 9063850 9367486 10540094 11550476 Free download. Registration or login required. |
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ZENER AND VOLTAGE REGULATOR DIODE RATING VERIFICATION AND CHARACTERIZATION TESTING |
JESD211.01 | Nov 2012 |
This standard is applicable to diodes that are used as voltage regulators and voltage references. It describes terms and definitions and explains methods for verifying device ratings and measuring device characteristics. Free download. Registration or login required. |
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XFM Device, Version 2.0 |
JESD233A | Dec 2023 |
This standard specifies the mechanical and electrical characteristics of the XFM removable memory Device. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Free download. Registration or login required. |
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Word Wide TTL and MOS SRAM |
SRAM3.7.7 | Apr 2007 |
Release No. 16. Item 1541.03 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Word Wide SDRAM. |
SDRAM3.11.4 | Feb 2008 |
Release No. 17. Item 1749.01 Committee(s): JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Word Wide ROM |
ROM3.2.2 | Dec 1992 |
Release No.6 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Word Wide PROM, DIP to SO Conversion |
PROM3.3.3-4 | Dec 1993 |
Release No.1 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Word Wide Graphics DRAM |
MPDRAM3.10.3 | Jan 2004 |
Release No.13 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Word Wide EPROM |
EPROM3.4.2 | Jun 1999 |
Release No.9 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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Word Wide DRAM |
DRAM3.9.4 | Jul 2000 |
Release No. 10 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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WITHDRAWN: Standard Practices and Procedures - Rectangular Grid Array Terminal Position Numbering. Item 11.2-641(S)Status: SupersededAugust 2016 (11.2-924) |
SPP-020A | Jul 2003 |
SPP-020 is a duplicate of SPP-010. SPP-010 has multiple solder ball pitch terminal numbering, SPP-020 does not. Since SPP-010 is more up to date than SPP-020 it is being withdrawn. SPP-010 covers both square and rectangular packages, SPP-020 covered only rectangular packages. Committee(s): JC-11.2, JC-11.11 Free download. Registration or login required. |
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WIRE BOND SHEAR TEST |
JESD22-B116B | May 2017 |
This fully revised test provides a means for determining the strength of gold and copper ball bonds to a die or package bonding surface, and may be performed on pre-encapsulation or post-encapsulation parts. Pictures have been added to enhance the fail mode diagrams. The wire bond shear test is destructive. The test method can also be used to shear aluminum and copper wedge bonds to a die or package bonding surface. It is appropriate for use in process development, process control and/or quality assurance. Free download. Registration or login required. |
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Wire Bond Pull Test Methods |
JESD22-B120 | Nov 2022 |
This test method provides a means for determining the strength and failure mode of a wire bonded to, and the corresponding interconnects on, a die or package bonding surface and may be performed on pre-encapsulation or post-encapsulation devices. Free download. Registration or login required. |
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WIDE I/O SINGLE DATA RATE (WIDE I/O SDR) |
JESD229 | Dec 2011 |
This standard defines the Wide I/O specification, including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. This standard covers the following technologies: Wide I/O. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 1 Gb through 32 Gb SDRAM (monolithic density) devices with 4, 128b wide channels using direct chip-to-chip attach methods between 1 to 4 memory devices and a controller device. Free download. Registration or login required. |
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WIDE I/O 2 (WideIO2) |
JESD229-2 | Aug 2014 |
This standard defines Wide I/O 2 (WideIO2), including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 8 Gb through 32 Gb SDRAM devices with 4 or 8 64-bit wide channels using direct chip-to-chip attach methods for between 1 and 4 memory devices and a controller/buffer device. The WideIO2 architecture is an evolution of the WIO architecture to enable bandwidth scaling with capacity. Committee(s): JC-42.6 Free download. Registration or login required. |
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VOLTAGE REGULATOR DIODE NOISE VOLTAGE MEASUREMENTStatus: Reaffirmed January 1992, April 1999, April 2002 |
JESD307 | May 1965 |
This standard is intended to cover the measurement of noise voltage in voltage regulator diodes in the reverse breakdown region. It describes noise voltage measurements at specified conditions, but may be used as a guide for making such measurements at other than specified conditions. Formerly known as RS-307 and/or EIA-307 Committee(s): JC-22.4 Free download. Registration or login required. |
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VIBRATION, VARIABLE FREQUENCY |
JESD22-B103B.01 | Sep 2016 |
The Vibration, Variable Frequency Test Method is intended to determine the ability of component(s) to withstand moderate to severe vibration as a result of motion produced by transportation or filed operation of electrical equipment. This is a destructive test that is intended for component qualification. This is a minor editorial change to JESD22-B103B, June 2002 (Reaffirmed September 2010). Committee(s): JC-14.1 Free download. Registration or login required. |
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VCSDRAM Specific SDRAM Functions |
SDRAM3.11.5.4 | Jun 1999 |
Release No. 9 Committee(s): JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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USER GUIDELINES FOR QUALITY AND RELIABILITY ASSURANCE OF LSI COMPONENTSStatus: RescindedApr-87 |
JEB17 | Jan 1970 |
USER GUIDELINES FOR IR THERMAL IMAGING DETERMINATION OF DIE TEMPERATURE: |
JEP138 | Sep 1999 |
The purpose of these user guidelines is to provide background and an example for the use of an infrared (IR) microscope to determine die temperature of electronic devices for calculations such as thermal resistance. Committee(s): JC-25 Free download. Registration or login required. |