Global Standards for the Microelectronics Industry
Standards & Documents Search
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Document # | Date |
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Guideline for Evaluating Gate Switching Instability of Silicon Carbide Metal-Oxide-Semiconductor Devices for Power Electronic Conversion |
JEP195 | Feb 2023 |
This document elaborates on the information given in JEP184 regarding the long-time stability of device parameters under static conditions and under application near switching conditions. Free download. Registration or login required. |
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Guideline for Gate Oxide Reliability and Robustness Evaluation Procedures for Silicon Carbide Power MOSFETs |
JEP194 | Feb 2023 |
This document provides guidelines for evaluating gate reliability and lifetime testing for silicon carbide (SiC) based power devices with a gate oxide or gate dielectric. Free download. Registration or login required. |
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GUIDELINE FOR INTERNAL GAS ANALYSIS FOR MICROELECTRONIC PACKAGESStatus: Reaffirmed November 2020 |
JEP144A | Nov 2011 |
This guideline is applicable to hermetically sealed microelectronic components (including discrete semiconductors, monolithic and hybrid microcircuits). Specific cases with unique packaging, materials, or environmental constraints may not find all of the following information and procedures applicable. Committee(s): JC-13 Free download. Registration or login required. |
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GUIDELINE FOR MEASUREMENT OF ELECTRONIC PACKAGE INDUCTANCE AND CAPACITANCE MODEL PARAMETERS: |
JEP123 | Oct 1995 |
The need for this guideline arose from widespread lack of consistency in characterizing electrical parameters of electronic packages, which existed in the industry until the early 1990s. Then, the JEDEC Committee JC-15 provided the forum where various methods were discussed and commonality in approach emerged. The result is that today we have relatively consistent results in measuring and reporting electrical package parameters, as well as specialized tools (e.g., the IPA-510, the interconnect parameter analyzer) which were developed to support the methodology. Free download. Registration or login required. |
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GUIDELINE FOR OBTAINING AND ACCEPTING MATERIAL FOR USE IN HYBRID/MCM PRODUCTSStatus: Reaffirmed May 2023 |
JEP142 | May 2023 |
This document provides guidance regarding design considerations, material assessment techniques, and recommendations for material acceptance prior to use in Hybrid/MCM Products. As part of the risk assessment process, both technical requirements and cost should be carefully considered with regard to testing/evaluating the elements of a hybrid microcircuit or Multi-chip Module (MCM) prior to material release for assembly. The intent of this document is to highlight various options that are available to the Hybrid / MCM manufacturer and provide associated guidance, not to impose a specific set of tests. Free download. Registration or login required. |
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Guideline for Reverse Bias Reliability Evaluation Procedures for Gallium Nitride Power Conversion Devices |
JEP198 | Nov 2023 |
This publication presents guidelines for evaluating the Time Dependent Breakdown (TDB) reliability of GaN power switches. Free download. Registration or login required. |
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GUIDELINE FOR SWITCHING RELIABILITY EVALUATION PROCEDURES FOR GALLIUM NITRIDE POWER CONVERSION DEVICES |
JEP180.01 | Jan 2021 |
This document is intended for use by GaN product suppliers and related power electronic industries. It provides guidelines for evaluating the switching reliability of GaN power switches and assuring their reliable use in power conversion applications. It is applicable to planar enhancement-mode, depletion-mode, GaN integrated power solutions and cascode GaN power switches. Committee(s): JC-70.1 Free download. Registration or login required. |
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Guideline to Specify a Transient Off-State Withstand Voltage Robustness Indicator in Datasheets for Lateral GaN Power Conversion Devices, Version 1.0 |
JEP186 | Dec 2021 |
This guideline describes different techniques for specifying a Transient Off-state Withstand Voltage Robustness Indicator in datasheets for lateral GaN power conversion devices. This guideline does not convey preferences for any of the specification types presented, nor does the guideline address formatting of datasheets. This guideline does not indicate nor require that the datasheet parameters are used in production tests, nor specify how the values were obtained. Committee(s): JC-70.1 Free download. Registration or login required. |
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GUIDELINES FOR COMBINING CIE 127-2007 TOTAL FLUX MEASUREMENTS WITH THERMAL MEASUREMENTS OF LEDS WITH EXPOSED COOLING SURFACE |
JESD51-52A | Nov 2022 |
This document is intended to be used in conjunction with the JESD51-50 series of standards, especially with JESD51-51 (Implementation of the Electrical Test Method for the Measurement of Real Thermal Resistance and Impedance of Light-emitting Diodes with Exposed Cooling Surface) document. This present document focuses on the measurement of the total radiant flux of LEDs in combination with the measurement of LEDs's thermal characteristics: guidelines on the implementation of the recommendations of the CIE 127-2007 document are provided. Committee(s): JC-15 Free download. Registration or login required. |
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GUIDELINES FOR GaAs MMIC PHEMT/MESFET AND HBT RELIABILITY ACCELERATED LIFE TESTING |
JEP118A | Dec 2018 |
These guidelines apply to GaAs Monolithic Microwave Integrated Circuits (MMICs) and their individual component building blocks, such as GaAs Metal-Semiconductor Field Effect Transistors (MESFETs), Pseudomorphic High Electron Mobility Transistors (PHEMTs), Heterojunction Bipolar Transistors (HBTs), resistors, and capacitors. While the procedure described in this document may be applied to other semiconductor technologies, especially those used in RF and microwave frequency analog applications, it is primarily intended for technologies based on GaAs and related III-V material systems (InP, AlGaAs, InGaAs, InGaP, GaN, etc). Committee(s): JC-14.7 Free download. Registration or login required. |
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Guidelines for Gate Charge (QG) Test Method for SiC MOSFET |
JEP192 | Jan 2023 |
This publication defines a QGS, TOT, QGD and QGS, TH which can be extracted from a measured QG waveform for SiC MOSFETs. Free download. Registration or login required. |
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Guidelines for Measuring the Threshold Voltage (VT) of SiC MOSFETs |
JEP183A | Jan 2023 |
This publication describes the guidelines for VT measurement methods and conditioning prior to VT testing in SiC power MOSFETs to reduce or eliminate the effect of the aforementioned hysteresis. Committee(s): JC-70.1 Free download. Registration or login required. |
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GUIDELINES FOR NONDESTRUCTIVE PULL TESTING OF WIRE BONDS ON HYBRID DEVICESStatus: Rescinded |
JEP96 | Jan 1977 |
Committee(s): JC-13.5 |
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Guidelines for Packing and Labeling of Integrated Circuits in Unit Container Packing (Tubes, Trays, and Tape and Reel) |
JEP130C | Feb 2023 |
This document establishes guidelines for integrated circuit unit container and the next level (intermediate) container packing and labeling. The guidelines include tube/rail standardization, intermediate packing, date codes, tube labeling, intermediate container and shipping labels, and standardize tube quantities. Future revisions of this document will also include tray and reel guidelines. The objective of this publication is to promote the standardization of practices between manufacturers and distributors resulting in improved efficiency, profitability, and product quality. Free download. Registration or login required. |
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Guidelines for Particle Impact Noise Detection (PIND) Testing, Operator Training, and Certification |
JEP114A | May 2023 |
This publication is a guideline to test facilities in their efforts to establish and maintain consistent particle impact noise detection (PIND) testing. Free download. Registration or login required. |
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GUIDELINES FOR PREPARING CUSTOMER-SUPPLIED BACKGROUND INFORMATION RELATING TO A SEMICONDUCTOR-DEVICE FAILURE ANALYSIS:Status: Reaffirmed January 2025 |
JEP134 | Sep 1998 |
The purpose of this Guideline is to provide a vehicle for acquiring and transmitting the necessary information in a concise, organized, and consistent format. Included in the Guideline is a sample form that facilitates transferring the maximum amount of background data to the failure analyst in a readily interpretable format. Immediate availability of this key information assists that analyst in completing a timely and accurate failure analysis. Committee(s): JC-14.4 Free download. Registration or login required. |
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GUIDELINES FOR REPORTING AND USING ELECTRONIC PACKAGE THERMAL INFORMATION |
JESD51-12.01 | Nov 2012 |
This document provides guidelines for both reporting and using electronic package thermal information generated using JEDEC JESD51 standards. By addressing these two areas, this document can be used as the common basis for discussion between electronic package thermal information suppliers and users. Free download. Registration or login required. |
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Guidelines for Representing Switching Losses of SIC MOSFETs in Datasheets |
JEP187 | Dec 2021 |
This document describes the impact of measurement and/or setup parameters on switching losses of power semiconductor switches; focusing primarily on SiC MOSFET turn-on losses. In terms of turn-off losses, the behavior of SiC MOSFETs is similar to that of existing silicon based power MOSFETs, and as such are adequately represented in typical datasheets. Committee(s): JC-70.2 Free download. Registration or login required. |
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Guidelines for Representing Threshold Voltage of SiC MOSFETs in Datasheets, Version 1.0Release Number: Version 1.0 |
JEP202 | Jan 2025 |
This publication provides guidelines for representation of threshold voltage and transfer characteristic of SiC MOS device in datasheets. Free download. Registration or login required. |
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Guidelines for Reverse Recovery Time and Charge Measurement of SiC MOSFET Version 1.0 |
JEP201 | Aug 2024 |
This guideline is intended to overcome the limitations of prior standards and provide a test circuit and method that provides both reliable and repeatable results. Free download. Registration or login required. |