Global Standards for the Microelectronics Industry
Standards & Documents Search
| Title | Document # |
Date |
|---|---|---|
Information Requirements for the Qualification of Solid State Devices |
JESD69D | Jun 2024 |
This standard defines the requirements for the device qualification package, which the supplier provides to the customer. Free download. Registration or login required. |
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Board Level Drop Test Method of Components for Handheld Electronic Products |
JESD22-B111A.01 | Jun 2024 |
This Test Method standardizes the test board and test methodology to provide a reproducible assessment of the drop test performance of surface mounted components. Free download. Registration or login required. |
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DDR5 Registering Clock Driver Definition (DDR5RCD04) |
JESD82-514.01 | Jun 2024 |
This document defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the DDR5 Registering Clock Driver (RCD) with parity for driving address and control nets on DDR5 RDIMM applications. The DDR5RCD04 Device ID is DID = 0x0054. Free download. Registration or login required. |
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Low Power Double Data Rate 4 (LPDDR4) |
JESD209-4E | Jun 2024 |
This document defines the LPDDR4 standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for a JEDEC compliant 16 bit per channel SDRAM device with either one or two channels. LPDDR4 dual channel device density ranges from 2 Gb through 32 Gb and single channel density ranges from 1 Gb through 16 Gb. Available for purchase: $374.00 Add to Cart Paying JEDEC Members may login for free access. |
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DDR5 DIMM Labels |
JESD401-5B.01 | May 2024 |
This standard defines the labels that shall be applied to all DDR5 memory modules to fully describe the key attributes of the module. The label can be in the form of a stick-on label, silk screened onto the assembly, or marked using an alternate customer-readable format. A readable point size should be used, and the number can be printed in one or more rows on the label. Hyphens may be dropped when lines are split, or when font changes sufficiently. Committee(s): JC-45 Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, GULL WING, RECTANGULAR PACKAGE |
MO-203D | May 2024 |
Item 11-1051 Package Designator: PDSO-G#_... Free download. Registration or login required. |
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PLASTIC BOTTOM GRID, ARRAY BALL, 0.50 MM X 0.70 MM PITCH RECTANGULAR FAMILY PACKAGE |
MO-360A | May 2024 |
Item #11-1048A Package Designator: PBGA-B#[#] I0p5... Free download. Registration or login required. |
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PLASTIC QUAD FLATPACK, 28 TERMINAL PACKAGE |
MO-339B | May 2024 |
Item 11-1054 Package Designator: PQFP-N28_I4p0... Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, GULL WING, 2 TERMINAL, RECTANGULAR PACKAGE (DIODE) |
DO-215-E | May 2024 |
Package Designator: P-PDSO-G2... Committee(s): JC-11, JC-11.1, JC-11.10 Free download. Registration or login required. |
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SHIPPING AND HANDLING TRAY FOR LPDDR5 CAMM2 MODULE |
CO-041A | Apr 2024 |
Item #11.5-1057 Free download. Registration or login required. |
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Marking, Symbols, and Labels of Leaded and Lead-Free Terminal Finished Materials Used in Electronic Assembly |
J-STD-609C.01 | Apr 2024 |
This standard applies to components and assemblies that contain Pb-free and Pb-containing solders and finishes, and it describes the marking and labeling of their shipping containers to identify their 2nd level terminal finish or material. Free download. Registration or login required. |
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SHIPPING AND HANDLING TRAY FOR CAMM2 CONNECTOR |
CO-040B | Apr 2024 |
Designator: N/A Item #: 11.5-1041 Free download. Registration or login required. |
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PLASTIC DUAL SMALL OUTLINE, FLAT LEAD, 2 TERMINAL, RECTANGULAR PACKAGE (DIODE) |
DO-219D | Apr 2024 |
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Free download. Registration or login required. |
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PMIC5020 Power Management IC StandardRelease Number: Version 1.0.1 |
JESD301-4 | Apr 2024 |
This standard defines the specifications of interface parameters, signaling protocols, and features for PMIC device as used for memory module applications. The designation PMIC5020 refers to the device specified by this document. The purpose is to provide a standard for the PMIC5020 device for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use. Free download. Registration or login required. |
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Procedure for Reliability Characterization of Metal-Insulator-Metal Capacitors |
JEP199 | Apr 2024 |
This document defines the standards for achieving Reliability certification and qualification of on-chip MIM Capacitors and MIS Trench Capacitors. Free download. Registration or login required. |
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PLASTIC BOTTOM GRID, ARRAY BALL, 0.60 MM X 0.0675 MM PITCH RECTANGULAR FAMILY PACKAGE |
MO-361A | Apr 2024 |
Designator: PBGA--B264[294]_I0p60-R8p7X14p4Z1p0-C0p3Z# Item: 11-1050 Free download. Registration or login required. |
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Gate Dielectric Breakdown |
JESD263 | Mar 2024 |
This document describes procedures developed for estimating the overall integrity of gate dielectrics. JESD263 supersedes these other 4 standards: JESD35A, JESD35-1 ADDENDUM, JESD35-2 and JESD92. Free download. Registration or login required. |
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JEDEC® Memory Module Reference Base Standard – for Compute Express Link® (CXL®) |
JESD317A | Mar 2024 |
This standard defines the specifications of interface parameters, signaling protocols, environmental requirements, packaging, and other features as reference for specific target implementations of CXL-attached memory modules. Committee(s): JC-45 Free download. Registration or login required. |
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SPI Safety Extensions (CRC) for Non Volatile SPI Flash Memories (QPI and xSPI) |
JESD255 | Mar 2024 |
The JESD255 document defines CRC modes supported with 8-bit aligned and 16-bit aligned data transactions. It is limited to logical bus transactions and does not cover the electrical properties of the IO bus. Free download. Registration or login required. |
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Guideline for Characterizing Solder Bump Electromigration Under Constant Current and Temperature Stress |
JEP154A | Mar 2024 |
This publication describes a method to test the electromigration susceptibility of solder bumps, including other types of bumps, such as solder capped copper pillars, used in flip-chip packages. Free download. Registration or login required. |
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