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Title	Document #	Date
Registration - Plastic Bottom Ball Grid Array, 0.75 mm Pitch Rectangular Family Package	MO-328B	Feb 2020
Designator: PBGA-B#[#]_I0p75... Item: 11.11-979, Access STP File for MO-328B Cross Reference: DR4.5 Committee(s): JC-11.11 JEP95 Registrations Main Page Free download. Registration or login required.
Registration - Plastic Bottom Grid Array Ball, 0.65 mm Pitch Square Family Package	MO-342A	Jan 2020
Designator: PBGA-B#[#}_I0p65 Item: 11.11-978, Access STP Files for MO-342A Cross Reference: DR4.5 Committee(s): JC-11.11 JEP95 Registrations Main Page Free download. Registration or login required.
CUSTOMER NOTIFICATION PROCESS FOR DISASTERS	JESD246A	Jan 2020
This standard establishes the requirements for timely notification to affected customers after a disaster has occurred at a supplier’s facility that will affect the committed delivery of product. This standard puts specific emphasis on notification, timing, and notification content which includes risk exposure, impact analysis, and recovery plans. This standard is applicable to suppliers of, and affected customers for, solid-state products and the constituent components used within. Committee(s): JC-14.4 Free download. Registration or login required.
POWER AND TEMPERATURE CYCLING	JESD22-A105D	Jan 2020
The power and temperature cycling test is performed to determine the ability of a device to withstand alternate exposures at high and low temperature extremes and simultaneously the operating biases are periodically applied and removed. It is intended to simulate worst case conditions encountered in application environments. The power and temperature cycling test is considered destructive and is only intended for device qualification. This test method applies to semiconductor devices that are subjected to temperature excursions and required to power on and off during all temperatures. Committee(s): JC-14, JC-14.1 Free download. Registration or login required.
LOW POWER DOUBLE DATA RATE (LPDDR5) Status: Superseded July 2021	JESD209-5A	Jan 2020
This document has been replaced by JESD209-5B. Item 1854.99A. Members of JC-42.6 may access a reference copy on the restricted members' website. Committee(s): JC-42.6
UNIVERSAL FLASH STORAGE (UFS), Version 3.1	JESD220E	Jan 2020
This document has been superseded by JESD220F, August 2022, however is available for reference only. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s): JC-64.1 Available for purchase: $355.00 Add to Cart To help cover the costs of producing standards, JEDEC is now charging for non-member access to selected standards and design files. Most of the content on this site remains free to download with registration. Paying JEDEC member companies enjoy free access to all content. Learn more and apply today. Paying JEDEC Members may login for free access.
MARK LEGIBILITY	JESD22-B114B	Jan 2020
This standard describes a nondestructive test to assess solid state device mark legibility. The specification applies only to solid state devices that contain markings, regardless of the marking method. It does not define what devices must be marked or the method in which the device is marked, i.e., ink, laser, etc. The standard is limited in scope to the legibility requirements of solid state devices, and does not replace related reference documents listed in this standard. Committee(s): JC-14.1 Free download. Registration or login required.
Annex A: Differences between JESD21C Release 29 and its predecessor JESD21C, Release 28. Release Number: 29	AnnexA - JESD21C	Jan 2020
This table briefly describes the changes made to this standard, JESD21-C, Release 29, compared to its predecessor, JESD21C, Release 28. Committee(s): JC-42.2, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Registration - Plastic Bottom Grid Array Ball, 0.80 MM x 0.70 MM Pitch Rectangular Family Package	MO-338A	Sep 2019
Item 11.11-973, Access STP Files for MO-338A Committee(s): JC-11.11 JEP95 Registrations Main Page Free download. Registration or login required.
SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 5 Release Number: 29	SPD4.1.2.L-5	Aug 2019
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 5. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2276.05. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.

Standards & Documents Search

Registration - Plastic Bottom Ball Grid Array, 0.75 mm Pitch Rectangular Family Package

Registration - Plastic Bottom Grid Array Ball, 0.65 mm Pitch Square Family Package

CUSTOMER NOTIFICATION PROCESS FOR DISASTERS

POWER AND TEMPERATURE CYCLING

LOW POWER DOUBLE DATA RATE (LPDDR5)

UNIVERSAL FLASH STORAGE (UFS), Version 3.1

MARK LEGIBILITY

Annex A: Differences between JESD21C Release 29 and its predecessor JESD21C, Release 28.

Registration - Plastic Bottom Grid Array Ball, 0.80 MM x 0.70 MM Pitch Rectangular Family Package

SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 5

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