Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
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Standard - .050 inch Leadless Chip Carrier, Type A. Variations AA-AH. |
MS-002-A | |
Committee(s): JC-11 Free download. Registration or login required. |
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Standard - .050 inch Center Leadless Chip Carrier, Type C. Variations CA-CH. Item 11.10-237. |
MS-004-B | |
Committee(s): JC-11 Free download. Registration or login required. |
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Standard - .050 inch Center Leaded Chip Carrier, 24 Terminal Leaded, Type A. |
MS-006-A | |
Committee(s): JC-11 Free download. Registration or login required. |
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Standard - .050 inch Center Lead Chip Carrier, Type B. Variations BA-BH. |
MS-008-A | |
Committee(s): JC-11 Free download. Registration or login required. |
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Standard - .050 inch Center Lead Chip Carrier, Type A. Variations AA-AH. |
MS-007-A | |
Committee(s): JC-11 Free download. Registration or login required. |
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Standard - .040 inch Center Leadless Chip Carrier Packages. Variations AA-AJ. |
MS-009-A | |
Committee(s): JC-11 Free download. Registration or login required. |
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SRAM Introduction |
SRAM3.7 | Oct 2001 |
Release No. 11 Committee(s): JC-42.2 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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SPI Safety Extensions (CRC) for Non Volatile SPI Flash Memories (QPI and xSPI) |
JESD255 | Mar 2024 |
The JESD255 document defines CRC modes supported with 8-bit aligned and 16-bit aligned data transactions. It is limited to logical bus transactions and does not cover the electrical properties of the IO bus. Free download. Registration or login required. |
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SPECIALITY DDR2-1066 SDRAM |
JESD208 | Nov 2007 |
This document defines the Specialty DDR2-1066 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of requirements for JEDEC compliant 256 Mb through 4 Gb for x4, x8, and x16 Specialty DDR2-1066 SDRAM devices. Committee(s): JC-42.3 Free download. Registration or login required. |
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SPECIAL REQUIREMENTS FOR MAVERICK PRODUCT ELIMINATION AND OUTLIER MANAGEMENTStatus: Reaffirmed |
JESD50C | Jan 2018 |
This standard applies to the identification and control of Maverick Product that can occur during fabrication, assembly, packaging, or test of any electronic component. It can be implemented for an entire product line or to segregate product that has a higher probability of adversely impacting quality or reliability. Free download. Registration or login required. |