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Title	Document #	Date
DISCONTINUING USE OF THE MACHINE MODEL FOR DEVICE ESD QUALIFICATION Status: Reaffirmed September 2020	JEP172A	Jul 2015
Over the last several decades the so called "machine model" (aka MM) and its application to the required ESD component qualification has been grossly misunderstood. The scope of this JEDEC document is to present evidence to discontinue use of this particular model stress test without incurring any reduction in the IC component's ESD reliability for manufacturing. In this regard, the document's purpose is to provide the necessary technical arguments for strongly recommending no further use of this model for IC qualification. The published document should be used as a reference to propagate this message throughout the industry. Committee(s): JC-14.3 Free download. Registration or login required.
DISTRIBUTOR REQUIREMENTS FOR HANDLING ELECTROSTATIC -DISCHARGE SENSITIVE (ESDS) DEVICES: SUPERSEDED BY JESD42, March 1994. Status: Superseded	JEP108-B	Apr 1991
Committee(s): JC-14, JC-14.1 Free download. Registration or login required.
DOUBLE DATA RATE (DDR) SDRAM STANDARD	JESD79F	Feb 2008
This comprehensive standard defines all required aspects of 64Mb through 1Gb DDR SDRAMs with X4/X8/X16 data interfaces, including features, functionality, ac and dc parametrics, packages and pin assignments. This scope will subsequently be expanded to formally apply to x32 devices, and higher density devices as well The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 64Mb through 1Gb, X4/X8/X16 DDR SDRAMs. System designs based on the required aspects of this specification will be supported by all DDR SDRAM vendors providing JEDEC compliant devices. Committee(s): JC-42.3 Free download. Registration or login required.
Double Word Wide MOS SRAM	SRAM3.7.8	Apr 2007
Release No. 16. Item 1541.03 Committee(s): JC-42, JC-42.2 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
DRAM Operational Features	DRAM3.9.5	Feb 2000
Release No.9 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
DRIVER SPECIFICATIONS FOR 1.8 V POWER SUPPLY POINT-TO-POINT DRIVERS	JESD8-17	Nov 2004
This material is intended to be reflected in supplier specifications for point to point DDR devices ranging from 400 Mb/s to 800 Mb/s operation. It is a method to specify driver impedance with something other than a number that does not nec-essarily define how it operates in a real net This standard addresses this issue using net lengths and specifies how much uncertainty can exist in the data for each speed supported. Committee(s): JC-16.1, JC-16 Free download. Registration or login required.
Dual Inline Memory Modules (DIMMs) Table of Contents	MODULE4.20.TOC	Dec 2014
Release No. 24 Committee(s): JC-42.2, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
DYNAMIC ON-RESISTANCE TEST METHOD GUIDELINES FOR GaN HEMT BASED POWER CONVERSION DEVICES, VERSION 1.0 Status: Reaffirmed November 2024	JEP173	Jan 2019
This document is intended for use in the GaN power semiconductor and related power electronic industries, and provides guidelines for measuring the dynamic ON-resistance of GaN power devices. Reaffirmed: November 2024 Committee(s): JC-70, JC-70.1 Free download. Registration or login required.
Dynamic Random Access Memory (DRAM) Table of Contents	DRAM3.9.TOC	Jul 1997
Release No. 9 Committee(s): JC-42, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
EARLY LIFE FAILURE RATE CALCULATION PROCEDURE FOR SEMICONDUCTOR COMPONENTS: Status: Reaffirmed January 2014, September 2019	JESD74A	Feb 2007
This standard defines methods for calculating the early life failure rate of a product, using accelerated testing, whose failure rate is constant or decreasing over time. For technologies where there is adequate field failure data, alternative methods may be used to establish the early life failure rate. The purpose of this standard is to define a procedure for performing measurement and calculation of early life failure rates. Projections can be used to compare reliability performance with objectives, provide line feedback, support service cost estimates, and set product test and screen strategies to ensure that the ELFR meets customers' requirements. Committee(s): JC-14, JC-14.3 Free download. Registration or login required.

Standards & Documents Search

DISCONTINUING USE OF THE MACHINE MODEL FOR DEVICE ESD QUALIFICATION

DISTRIBUTOR REQUIREMENTS FOR HANDLING ELECTROSTATIC -DISCHARGE SENSITIVE (ESDS) DEVICES: SUPERSEDED BY JESD42, March 1994.

DOUBLE DATA RATE (DDR) SDRAM STANDARD

Double Word Wide MOS SRAM

DRAM Operational Features

DRIVER SPECIFICATIONS FOR 1.8 V POWER SUPPLY POINT-TO-POINT DRIVERS

Dual Inline Memory Modules (DIMMs) Table of Contents

DYNAMIC ON-RESISTANCE TEST METHOD GUIDELINES FOR GaN HEMT BASED POWER CONVERSION DEVICES, VERSION 1.0

Dynamic Random Access Memory (DRAM) Table of Contents

EARLY LIFE FAILURE RATE CALCULATION PROCEDURE FOR SEMICONDUCTOR COMPONENTS:

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