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Title	Document #	Date
168 Pin Unbuffered DRAM DIMM	MODULE4.5.3	Jun 1999
Release No. 9 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
168 Pin Unbuffered SDRAM DIMM	MODULE4.5.4	Jun 1999
Release No.9 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
168 Pin, PC-133 SDRAM Registered DIMM Design Specification	MODULE4.20.2	Oct 2003
Release No. 13 Committee(s): JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
184 Pin DIMM Family Supplementary Design Standards	MODULE4.5.12	Oct 2000
Release No.10 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
184 Pin Unbuffered DDR SDRAM DIMM	MODULE4.5.10	May 2021
Release No.31 This revision contains terminology updates only. Committee(s): JC-42, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
184 Pin Unbuffered SDR SDRAM DIMM Family	MODULE4.5.11	May 2021
Release No.31 This revision contains terminology updates only. Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
184 Pin, PC-1600/PC-2100 DDR SDRAM Unbuffered DIMM Design Specification.	MODULE4.20.5	May 2021
Release No. 31 This revision contains terminology updates only. Committee(s): JC-42, JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
184-Pin PC-2700 SDRAM Unbuffered DIMM - TSOP-Based DRAMs Design Specification	MODULE4.20.8	May 2021
Release No. 31 This revision contains terminology updates only. Committee(s): JC-42, JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
2.5 V BiCMOS LOGIC DEVICE FAMILY SPECIFICATION WITH 5 V TOLERANT INPUTS AND OUTPUTS:	JESD70	Jun 1999
The purpose is to provide a standard for 2.5 V nominal supply voltage logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use, thus providing compatibility between devices operating between 2.3 V and 2.7 V supply voltages, as well as overvoltage tolerance with devices operating at 3.3 V, or 5 V. Committee(s): JC-40 Free download. Registration or login required.
200 Pin SDRAM DIMM	MODULE4.5.2	Oct 2001
Release No.11 Committee(s): JC-42, JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.

Standards & Documents Search

168 Pin Unbuffered DRAM DIMM

168 Pin Unbuffered SDRAM DIMM

168 Pin, PC-133 SDRAM Registered DIMM Design Specification

184 Pin DIMM Family Supplementary Design Standards

184 Pin Unbuffered DDR SDRAM DIMM

184 Pin Unbuffered SDR SDRAM DIMM Family

184 Pin, PC-1600/PC-2100 DDR SDRAM Unbuffered DIMM Design Specification.

184-Pin PC-2700 SDRAM Unbuffered DIMM - TSOP-Based DRAMs Design Specification

2.5 V BiCMOS LOGIC DEVICE FAMILY SPECIFICATION WITH 5 V TOLERANT INPUTS AND OUTPUTS:

200 Pin SDRAM DIMM

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