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Annex E, R/C E, in 260-Pin, 1.2 V (VDD), PC4-1600/PC4-1866/PC4-2133/PC4-2400/PC4-2666/PC4-3200 DDR4 SDRAM SODIMM Design Specification

Release Number: 30 		MODULE4.20.25.E May 2020

This specification defines the electrical and mechanical requirements for Raw Card E, 260-pin, 1.2 Volt (VDD), Small Outline, Double Data Rate, Synchronous DRAM Dual In-Line Memory Modules (DDR4 SDRAM SODIMMs). These DDR4 SODIMMs are intended for use as main memory when installed in PCs, laptops, and other systems. Item 2228.33C.

Committee(s): JC-45.3

JESD21-C Solid State Memory Documents Main Page

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DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card C Annex

Release Number: Version 2.00 		JESD305-R8-RCC Feb 2025

This standard, JESD305-R8-RCC, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card C Annex, defines the design detail of x4, 1 Package Rank DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Registered Dual Inline Memory Module (RDIMM) Common Standard.

Committee(s): JC-45, JC-45.1

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DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card E Annex

Release Number: Version 2.00 		JESD305-R8-RCE Feb 2025

This standard, JESD305-R8-RCE, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card E Annex, defines the design detail of x8, 2 Package Rank DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Registered Dual Inline Memory Module (RDIMM) Common Standard.

Committee(s): JC-45, JC-45.1

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DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card A Annex

Release Number: Version 2.00 		JESD305-R8-RCA Feb 2025

This annex, JESD305-R8-RCA, DDR5 Registered Dual Inline Memory Module with 8-bit ECC (EC8 RDIMM) Raw Card A Annex, defines the design detail of x4, 2 Package Rank DDR5 RDIMM with 8-bit ECC. The common feature of DDR5 RDIMM, such as the connector pinout, can be found in the JESD305, DDR5 Registered Dual Inline Memory Module (RDIMM) Common Standard.

Committee(s): JC-45, JC-45.1

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DDR5 Small Outline Dual Inline Memory Module (SODIMM) Raw Card B Annex

Release Number: Version 1.1 		JESD309-S0-RCB Mar 2025

This annex, JESD309-S0-RCB, DDR5 Small Outline Dual Inline Memory Module with 0-bit ECC (EC0 SODIMM) Raw Card B Annex", defines the design detail of x8, 2 Package Ranks DDR5 NECC SODIMM. The common feature of DDR5 SODIMM such as the connector pinout can be found in the JESD309, DDR5 Small Outline Dual Inline Memory Module (SODIMM) Common Standard.

Committee(s): JC-45, JC-45.3

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DDR5 Clocked Small Outline Dual Inline Memory Module with 4-bit ECC (EC4 CSODIMM) Raw Card D Annex

Release Number: Version 1.00 		JESD324-W4-RCD Nov 2024

This standard, JESD324-W4-RCD, “DDR5 Clocked Small Outline Dual Inline Memory Module with 4-bit ECC (EC4 CSODIMM) Raw Card D Annex” defines the design detail of x8, 1 Package Ranks DDR5 CSODIMM with Clock Driver.

Committee(s): JC-45.3

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DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card A Annex

Release Number: Version 1.00 		JESD323-A0-RCA Nov 2024

This standard, JESD323-A0-RCA, “DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card A Annex” defines the design detail of x8, 1 Package Rank DDR5 NECC CUDIMM with Clock Driver.

Committee(s): JC-45, JC-45.3

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DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card A Annex

Release Number: Version 1.00 		JESD323-A0-RCA Nov 2024

This standard, JESD323-A0-RCA, “DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card A Annex” defines the design detail of x8, 1 Package Rank DDR5 NECC CUDIMM with Clock Driver.

Committee(s): JC-45, JC-45.3

DDR5 Clocked Unbuffered Dual Inline Memory Module with 4-bit ECC

Release Number: Version 1.00 		JESD323-B4-RCD Nov 2024

This standard, JESD323-B4-RCD, “DDR5 Clocked Unbuffered Dual Inline Memory Module with 4-bit ECC (EC4 CUDIMM) Raw Card D Annex” defines the design detail of x8, 1 Package Rank DDR5 ECC CUDIMM with Clock Driver.

Committee(s): JC-45, JC-45.3

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DDR5 Clocked Small Outline Dual Inline Memory Module (CSODIMM) Raw Card A Annex

Release Number: Version 1.00 		JESD324-V0-RCA Nov 2024

This standard, JESD324-V0-RCA, “DDR5 Clocked Small Outline Dual Inline Memory Module (CSODIMM) Raw Card A Annex” defines the design detail of x8, 1 Package Ranks DDR5 CSODIMM with Clock Driver.

Committee(s): JC-45, JC-45.3

Free download. Registration or required.

DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card B Annex

Release Number: Version 1.00 		JESD323-A0-RCB Feb 2025

This annex, JESD323-A0-RCB, “DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card B Annex", defines the design detail of x8, 2 Package Ranks DDR5 CUDIMM. The common feature of DDR5 CUDIMM such as the connector pinout can be found in the JESD323, DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Common Standard.

Committee(s): JC-45, JC-45.3

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DDR5 Clocked Unbuffered Dual Inline Memory Module with 4-bit ECC (EC4 CUDIMM) Raw Card E Annex

Release Number: Version 1.00 		JESD323-B4-RCE Feb 2025

This annex, JESD323-B4-RCE, “DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Raw Card E Annex" defines the design detail of x8, 2 Package Ranks DDR5 CUDIMM. The common feature of DDR5 CUDIMM such as the connector pinout can be found in the JESD323, DDR5 Clocked Unbuffered Dual Inline Memory Module (CUDIMM) Common Standard.

Committee(s): JC-45, JC-45.3

Free download. Registration or required.

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