Global Standards for the Microelectronics Industry
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Title | Document # | Date |
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LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD FOR LEADED SURFACE MOUNT PACKAGES: |
JESD51- 3 | Aug 1996 |
This standard describes design requirements for a single layer, leaded surface mount integrated circuit package thermal test board. The standard describes board material and geometry requirements, minimum trace lenghts, trace thickness, and routing considerations. Application includes still air and moving air thermal tests. Committee(s): JC-15.1 Free download. Registration or login required. |