Global Standards for the Microelectronics Industry
Standards & Documents Search
Title |
Document # | Date |
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UNIVERSAL FLASH STORAGE (UFS), Version 3.0Status: Superseded January 2020 |
JESD220D | Jan 2018 |
This document has been superseded by JESD220E, January 2020, however is available for reference only. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s): JC-64.1 Available for purchase: $355.00 Add to Cart Paying JEDEC Members may login for free access. |
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UNIVERSAL FLASH STORAGE (UFS), Version 3.1 |
JESD220E | Jan 2020 |
This document has been superseded by JESD220F, August 2022, however is available for reference only. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s): JC-64.1 Available for purchase: $355.00 Add to Cart Paying JEDEC Members may login for free access. |
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UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), UNIFIED MEMORY EXTENSION, Version 1.1A |
JESD223-1B | May 2016 |
This Unified Memory Extension standard is an extension to the UFSHCI standard, JESD223. The UFSHCI standard defines the interface between the UFS driver and the UFS host controller. In addition to the register interface, it defines data structures inside the system memory, which are used to exchange data, control and status information. Furthermore the UFSHCI standard defines the protocol layer structure and abstract entities within these layers. Unified Memory offers the possibility to move Device internal working memory into the system memory to reduce overall system cost and to improve Device performance. Item 203.25 Patents(): Apple: 2010/0250836; Toshiba: P2011-252001, 13/561392, 101126675, 201210272624.X, 13/758090, 101132071, 201210332970.2, P2012-194380, P2012-194380, P2012-194380; Memory Technology: 2013/0198434, 2010/0312947 Committee(s): JC-64.1 Free download. Registration or login required. |
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UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), Version 2.1Status: Supersededby JESD223D, January 2018 |
JESD223C | Mar 2016 |
This document has been superseded by JESD223D, January 2018, however is available for reference only. Committee(s): JC-64.1 Free download. Registration or login required. |
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UNIVERSAL FLASH STORAGE HOST CONTROLLER INTERFACE (UFSHCI), Version 3.0Status: Superseded August 2022 by JESD223E |
JESD223D | Jan 2018 |
This document has been superseded by JESD223E, however it is available for reference only. Committee(s): JC-64.1 Available for purchase: $141.00 Add to Cart Paying JEDEC Members may login for free access. |
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Universal Flash Storage Host Controller Interface (UFSHCI), Version 4.0 |
JESD223E | Aug 2022 |
This standard describes a functional specification of the Host Controller Interface (HCI) for Universal Flash Storage (UFS). The objective of UFSHCI is to provide a uniform interface method of accessing the UFS hardware capabilities so that a standard/common Driver can be provided for the Host Controller. The common Driver would work with UFS host controller from any vendor. This standard includes a description of the hardware/software interface between system software and the host controller hardware. It is intended for hardware designers, system builders and software developers. This standard is a companion document to [UFS], Universal Flash Storage (UFS). The reader is assumed to be familiar with [UFS], [MIPI-UNIPRO], and [MIPI-M-PHY]. Item 206.25 Committee(s): JC-64.1 Available for purchase: $163.00 Add to Cart Paying JEDEC Members may login for free access. |
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UNIVERSAL FLASH STORAGE, UFS 2.2 |
JESD220C-2.2 | Aug 2020 |
The purpose of this standard is definition of a UFS Universal Flash Storage electrical interface and a UFS memory device. This standard defines a unique UFS feature set and includes the feature set of eMMC standard as a subset. This standard replaces JESD220C, UFS 2.1, and introduces a feature called WriteBooster. Item 138.88. Committee(s): JC-64.1 Free download. Registration or login required. |
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UNIVERSAL FLASH STORAGE, Version 4.0 |
JESD220F | Aug 2022 |
This document replaces all past versions, however JESD220E, January 2020 (V 3.1), is available for reference only. This standard specifies the characteristics of the UFS electrical interface and the memory device. Such characteristics include (among others) low power consumption, high data throughput, low electromagnetic interference and optimization for mass memory subsystem efficiency. The UFS electrical interface is based on an advanced differential interface by MIPI M-PHY specification which together with the MIPI UniPro specification forms the interconnect of the UFS interface. Committee(s): JC-64.1 Available for purchase: $369.00 Add to Cart Paying JEDEC Members may login for free access. |
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USER GUIDE FOR MICROCIRCUIT FAILURE ANALYSIS:Status: RescindedNovember 2004 |
JEB16 | Jul 1970 |
This guide defines generalized procedures for the failure analysis of monolithic integrated microelectronic circuits. Although the generalized procedural steps may apply to all microelectronic circuits, additional analysis steps unique to thin/thick film hybrid devices are not covered. Committee(s): JC-14 Free download. Registration or login required. |
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USER GUIDELINES FOR IR THERMAL IMAGING DETERMINATION OF DIE TEMPERATURE: |
JEP138 | Sep 1999 |
The purpose of these user guidelines is to provide background and an example for the use of an infrared (IR) microscope to determine die temperature of electronic devices for calculations such as thermal resistance. Committee(s): JC-25 Free download. Registration or login required. |
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USER GUIDELINES FOR QUALITY AND RELIABILITY ASSURANCE OF LSI COMPONENTSStatus: RescindedApr-87 |
JEB17 | Jan 1970 |
VCSDRAM Specific SDRAM Functions |
SDRAM3.11.5.4 | Jun 1999 |
Release No. 9 Committee(s): JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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VIBRATION, VARIABLE FREQUENCY |
JESD22-B103B.01 | Sep 2016 |
The Vibration, Variable Frequency Test Method is intended to determine the ability of component(s) to withstand moderate to severe vibration as a result of motion produced by transportation or filed operation of electrical equipment. This is a destructive test that is intended for component qualification. This is a minor editorial change to JESD22-B103B, June 2002 (Reaffirmed September 2010). Committee(s): JC-14.1 Free download. Registration or login required. |
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VOLTAGE REGULATOR DIODE NOISE VOLTAGE MEASUREMENTStatus: Reaffirmed January 1992, April 1999, April 2002 |
JESD307 | May 1965 |
This standard is intended to cover the measurement of noise voltage in voltage regulator diodes in the reverse breakdown region. It describes noise voltage measurements at specified conditions, but may be used as a guide for making such measurements at other than specified conditions. Formerly known as RS-307 and/or EIA-307 Committee(s): JC-22.4 Free download. Registration or login required. |
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WIDE I/O 2 (WideIO2) |
JESD229-2 | Aug 2014 |
This standard defines Wide I/O 2 (WideIO2), including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 8 Gb through 32 Gb SDRAM devices with 4 or 8 64-bit wide channels using direct chip-to-chip attach methods for between 1 and 4 memory devices and a controller/buffer device. The WideIO2 architecture is an evolution of the WIO architecture to enable bandwidth scaling with capacity. Committee(s): JC-42.6 Free download. Registration or login required. |
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WIDE I/O SINGLE DATA RATE (WIDE I/O SDR) |
JESD229 | Dec 2011 |
This standard defines the Wide I/O specification, including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. This standard covers the following technologies: Wide I/O. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 1 Gb through 32 Gb SDRAM (monolithic density) devices with 4, 128b wide channels using direct chip-to-chip attach methods between 1 to 4 memory devices and a controller device. Free download. Registration or login required. |
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Wire Bond Pull Test Methods |
JESD22-B120.01 | Sep 2024 |
This test method provides a means for determining the strength and failure mode of a wire bonded to, and the corresponding interconnects on, a die or package bonding surface and may be performed on pre-encapsulation or post-encapsulation devices. Free download. Registration or login required. |
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WIRE BOND SHEAR TEST |
JESD22-B116B | May 2017 |
This fully revised test provides a means for determining the strength of gold and copper ball bonds to a die or package bonding surface, and may be performed on pre-encapsulation or post-encapsulation parts. Pictures have been added to enhance the fail mode diagrams. The wire bond shear test is destructive. The test method can also be used to shear aluminum and copper wedge bonds to a die or package bonding surface. It is appropriate for use in process development, process control and/or quality assurance. Free download. Registration or login required. |
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WITHDRAWN: Standard Practices and Procedures - Rectangular Grid Array Terminal Position Numbering. Item 11.2-641(S)Status: SupersededAugust 2016 (11.2-924) |
SPP-020A | Jul 2003 |
SPP-020 is a duplicate of SPP-010. SPP-010 has multiple solder ball pitch terminal numbering, SPP-020 does not. Since SPP-010 is more up to date than SPP-020 it is being withdrawn. SPP-010 covers both square and rectangular packages, SPP-020 covered only rectangular packages. Committee(s): JC-11.2, JC-11.11 Free download. Registration or login required. |
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Word Wide DRAM |
DRAM3.9.4 | Jul 2000 |
Release No. 10 Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required. |
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