Global Standards for the Microelectronics Industry
Standards & Documents Search
Displaying 1 - 1 of 1 documents.
Title | Document # | Date |
---|---|---|
LEAD INTEGRITYStatus: Reaffirmed - May 2023 |
JESD22-B105E | Feb 2017 |
This test method provides various tests for determining the integrity lead/package interface and the lead itself when the lead(s) are bent due to faulty board assembly followed by rework of the part for reassembly. For hermetic packages it is recommend that this test be followed by hermeticity tests in accordance with Test Method A109 to determine if there are any adverse effects from the stresses applied to the seals as well as to the leads. These tests, including each of its test conditions, is considered destructive and is only recommended for qualification testing. This test is applicable to all through-hole devices and surface-mount devices requiring lead forming by the user. Free download. Registration or login required. |