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Title	Document #	Date
SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 6 Release Number: 30	SPD4.1.2.L-6	Nov 2020
This annex describes the serial presence detect (SPD) values for all DDR4 modules covered in Document Release 6. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. Item 2220.01H. Committee(s): JC-45 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Addendum No. 1 to JESD79-4, 3D STACKED DRAM	JESD79-4-1B	Feb 2021
This document defines the 3DS DDR4 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for a compliant 8 Gbit through 128 Gbit for x4, x8 3DS DDR4 SDRAM devices. This addendum was created based on the JESD79-4 DDR4 SDRAM specification. Each aspect of the changes for 3DS DDR4 SDRAM operation was considered. Item 1727.58G Committee(s): JC-42.3C Free download. Registration or login required.
240-Pin PC2-5300/PC2-6400 DDR2 SDRAM Unbuffered DIMM Design Specification	MODULE4.20.13	May 2021
Release 31. Item 2167.05 This revision contains terminology updates only. Committee(s): JC-45, JC-45.2, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Unbuffered DIMM Design Specification	MODULE4.20.19	May 2021
Release No. 31. Item 2131.03, 2078.04, 2131.06 This revision contains terminology updates only. Committee(s): JC-45, JC-45.2, JC-45.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
184 Pin Unbuffered DDR SDRAM DIMM	MODULE4.5.10	May 2021
Release No.31 This revision contains terminology updates only. Committee(s): JC-42, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
184 Pin Unbuffered SDR SDRAM DIMM Family	MODULE4.5.11	May 2021
Release No.31 This revision contains terminology updates only. Committee(s): JC-42 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
240-Pin Unbuffered and Registered DDR2 SDRAM DIMM Family	MODULE4.5.14	May 2021
Release No. 31 This revision contains terminology updates only. Committee(s): JC-42, JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
184-Pin PC-2700 SDRAM Unbuffered DIMM - TSOP-Based DRAMs Design Specification	MODULE4.20.8	May 2021
Release No. 31 This revision contains terminology updates only. Committee(s): JC-42, JC-42.5 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Low Power Double Data Rate 4 (LPDDR4)	JESD209-4E	Jun 2024
This document defines the LPDDR4 standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for a JEDEC compliant 16 bit per channel SDRAM device with either one or two channels. LPDDR4 dual channel device density ranges from 2 Gb through 32 Gb and single channel density ranges from 1 Gb through 16 Gb. Committee(s): JC-42, JC-42.6 Available for purchase: $374.00 Add to Cart To help cover the costs of producing standards, JEDEC is now charging for non-member access to selected standards and design files. Most of the content on this site remains free to download with registration. Paying JEDEC member companies enjoy free access to all content. Learn more and apply today. Paying JEDEC Members may login for free access.
DDR5 SERIAL PRESENCE DETECT (SPD) CONTENTS Release Number: Release 1.3	JESD400-5C	Sep 2024
This standard describes the serial presence detect (SPD) values for all DDR5 memory modules. In this context, “modules” applies to memory modules like traditional Dual In-line Memory Modules (DIMMs) or solder-down motherboard applications. The SPD data provides critical information about all modules on the memory channel and is intended to be use by the system's BIOS in order to properly initialize and optimize the system memory channels. Committee(s): JC-45 Free download. Registration or login required.

Standards & Documents Search

SPD Annex L: Serial Presence Detect (SPD) for DDR4 SDRAM Modules, Release 6

Addendum No. 1 to JESD79-4, 3D STACKED DRAM

240-Pin PC2-5300/PC2-6400 DDR2 SDRAM Unbuffered DIMM Design Specification

240-Pin PC3-6400/PC3-8500/PC3-10600/PC3-12800/PC3-14900/PC3-17000 DDR3 SDRAM Unbuffered DIMM Design Specification

184 Pin Unbuffered DDR SDRAM DIMM

184 Pin Unbuffered SDR SDRAM DIMM Family

240-Pin Unbuffered and Registered DDR2 SDRAM DIMM Family

184-Pin PC-2700 SDRAM Unbuffered DIMM - TSOP-Based DRAMs Design Specification

Low Power Double Data Rate 4 (LPDDR4)

DDR5 SERIAL PRESENCE DETECT (SPD) CONTENTS

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