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Title	Document #	Date
SDRAM and SGRAM Architectural Operational Features Table of Contents	SDRAM3.11.5.TOC	May 2006
Release No.16 Committee(s): JC-42, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Registration - DDR3 SDRAM DIMM (Dual Inline Memory Module) Family, Flex-Based, 1.00 mm contact Centers	MO-290-A	Nov 2007
Item 11.14-118 Patents(): STAKTEK, See Outline Committee(s): JC-11 JEP95 Registrations Main Page Free download. Registration or login required.
Registration - DDR2 SDRAM DIMM (Dual Inline memory Module) Family, Flex-Based, 1.00 mm Contact Centers.	MO-281-A	Nov 2006
Item 11.14-100 Patents(): STAKTEK: See Outline Committee(s): JC-11 JEP95 Registrations Main Page Free download. Registration or login required.
Registration - DDR2 SDRAM DIMM (Dual Inline Memory Module) Family with 1.00 mm Contact Centers.	MO-237-G.01	Apr 2011
Item 11.14-128, 11.14-128E Patents(): Hitachi: 5,227,664 Committee(s): JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
Registration - 240 Pin DDR3 DIMM (Dual Inline Memory Module) Family with 1.00 mm pitch. DIM	MO-269J	Apr 2014
Item 11.14-163 Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
Registration - 240 pin DDR2 SDRAM, 1.00 mm contact centers, Socket Outline. Item 11.14-061.	SO-001B	Jul 2003
Committee(s): JC-11, JC-11.14 JEP95 Registrations Main Page Free download. Registration or login required.
Registration - 204 Pin SO-DDR3 SDRAM, 0.60 mm Contact Centers, Socket Outline.	SO-006B	Oct 2007
Item 11.14-114 Patents(): Foxconn (Hon Hai): 5,882,211, 6,113,398 Committee(s): JC-11 JEP95 Registrations Main Page Free download. Registration or login required.
Nibble Wide SDRAM	SDRAM3.11.2	Jan 2004
Release No.13 Committee(s): JC-42, JC-42.3 JESD21-C Solid State Memory Documents Main Page Free download. Registration or login required.
Low Power Double Data Rate 4 (LPDDR4)	JESD209-4E	Jun 2024
This document defines the LPDDR4 standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for a JEDEC compliant 16 bit per channel SDRAM device with either one or two channels. LPDDR4 dual channel device density ranges from 2 Gb through 32 Gb and single channel density ranges from 1 Gb through 16 Gb. Committee(s): JC-42, JC-42.6 Available for purchase: $374.00 Add to Cart To help cover the costs of producing standards, JEDEC is now charging for non-member access to selected standards and design files. Most of the content on this site remains free to download with registration. Paying JEDEC member companies enjoy free access to all content. Learn more and apply today. Paying JEDEC Members may login for free access.
LOW POWER DOUBLE DATA RATE 3 SDRAM (LPDDR3)	JESD209-3C	Aug 2015
This document defines the LPDDR3 Standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant 4 Gb through 32 Gb for x16 and x32 SDRAM devices. This document was created using aspects of the following standards: DDR2 (JESD79-2), DDR3 (JESD79-3), LPDDR (JESD209), and LPDDR2 (JESD209-2). Committee Item no. 1798.11D. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s): JC-42.6 Available for purchase: $208.00 Add to Cart Paying JEDEC Members may login for free access.

Standards & Documents Search

SDRAM and SGRAM Architectural Operational Features Table of Contents

Registration - DDR3 SDRAM DIMM (Dual Inline Memory Module) Family, Flex-Based, 1.00 mm contact Centers

Registration - DDR2 SDRAM DIMM (Dual Inline memory Module) Family, Flex-Based, 1.00 mm Contact Centers.

Registration - DDR2 SDRAM DIMM (Dual Inline Memory Module) Family with 1.00 mm Contact Centers.

Registration - 240 Pin DDR3 DIMM (Dual Inline Memory Module) Family with 1.00 mm pitch. DIM

Registration - 240 pin DDR2 SDRAM, 1.00 mm contact centers, Socket Outline. Item 11.14-061.

Registration - 204 Pin SO-DDR3 SDRAM, 0.60 mm Contact Centers, Socket Outline.

Nibble Wide SDRAM

Low Power Double Data Rate 4 (LPDDR4)

LOW POWER DOUBLE DATA RATE 3 SDRAM (LPDDR3)

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