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This document defines the Low Power Double Data Rate (LPDDR) SDRAM 1.2 V I/O, including AC and DC operating conditions, extended mode register settings, and I-V characteristics. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 64 Mb through 2 Gb for x16 and x32 Low Power Double Data Rate SDRAM devices with 1.2 V I/O. System designs based on the required aspects of this specification will be supported by all LPDDR SDRAM vendors providing compliant devices.

Committee(s): JC-42.6

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Release No. 21
Item 2202.01

Committee(s): JC-45.1

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Committee Document Reference Title: LPDDR3 and LPDDR4 SPD Document Release 1
Device Type Identifier: LP-DIMM Revision 1.0

This Annex describes the serial presence detect (SPD) values for all LPDDR modules. Differences between module types are encapsulated in subsections of this annex. These presence detect values are those referenced in the SPD standard document for ‘Specific Features’. The following SPD fields will be documented in the order presented in Section 2, with the exception of bytes 128~255 which are documented in separate sections, one for each family of module types. Further description of Byte 2 is found in Annex A of the SPD standard. Item 2254.01

Committee(s): JC-45

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Release No. 19

Committee(s): JC-45, JC-45.1

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