Global Standards for the Microelectronics Industry
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Displaying 1 - 2 of 2 documents.
| Title | Document # | Date |
|---|---|---|
A PROCEDURE FOR MEASURING P-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION AT MAXIMUM GATE CURRENT UNDER DC STRESS: |
JESD60A | Sep 2004 |
This method establishes a standard procedure for accelerated testing of the hot-carrier-induced change of a p-channel MOSFET. The objective is to provide a minimum set of measurements so that accurate comparisons can be made between different technologies. The measurements specified should be viewed as a starting pint in the characterization and benchmarking of the trasistor manufacturing process. Committee(s): JC-14.2 Free download. Registration or login required. |
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A PROCEDURE FOR MEASURING P-CHANNEL MOSFET NEGATIVE BIAS TEMPERATURE INSTABILITIESStatus: Rescinded September 2021 (JC-14.2-21-183) |
JESD90 | Nov 2004 |
This document hasbeen replaced by JESD241, September 2021. |
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